CY7C68014A-56BAXC Cypress Semiconductor Corp, CY7C68014A-56BAXC Datasheet - Page 38

• Manufacturer Part Number: CY7C68014A-56BAXC
• Description: IC MCU USB PERIPH HI SPD 56VFBGA
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX2LP™r

Specifications of CY7C68014A-56BAXC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C680xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 24
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VFBGA
• Core Size: 16bit
• No. Of I/o's: 24
• Program Memory Size: 16KB
• Ram Memory Size: 16KB
• Cpu Speed: 48MHz
• Oscillator Type: External Only
• No. Of Timers: 3
• Digital Ic Case Style: VFBGA
• Supply Voltage Range: 3V
• Controller Family/series: EZ-USB FX2LP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4611B - KIT USB TO ATA REFERENCE DESIGN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Document #: 38-08032 Rev. *K
10.2
Table 10-1. Program Memory Read Parameters
Notes:
17. CLKOUT is shown with positive polarity.
18. t
CLKOUT
t
t
t
t
t
t
t
t
CL
AV
STBL
STBH
SOEL
SCSL
DSU
DH
Parameter
t
t
ACC1
ACC1
ACC1
A[15..0]
PSEN#
D[7..0]
CS#
OE#
(24 MHz) = 3*t
(48 MHz) = 3*t
Program Memory Read
is computed from the above parameters as follows:
[17]
1/CLKOUT Frequency
Delay from Clock to Valid Address
Clock to PSEN Low
Clock to PSEN High
Clock to OE Low
Clock to CS Low
Data Set-up to Clock
Data Hold Time
CL
CL
t
AV
– t
– t
t
CL
AV
AV
– t
– t
t
SOEL
t
SCSL
DSU
DSU
= 106 ns
= 43 ns.
Description
Figure 10-1. Program Memory Read Timing Diagram
t
STBL
t
ACC1
[18]
data in
t
Min.
STBH
t
9.6
DH
0
0
0
0
20.83
41.66
Typ.
83.2
t
CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
AV
Max.
10.7
11.1
13
8
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Page 38 of 60
48 MHz
24 MHz
12 MHz
Notes