CY7C68014A-56BAXC Cypress Semiconductor Corp, CY7C68014A-56BAXC Datasheet - Page 32

• Manufacturer Part Number: CY7C68014A-56BAXC
• Description: IC MCU USB PERIPH HI SPD 56VFBGA
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX2LP™r

Specifications of CY7C68014A-56BAXC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C680xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 24
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VFBGA
• Core Size: 16bit
• No. Of I/o's: 24
• Program Memory Size: 16KB
• Ram Memory Size: 16KB
• Cpu Speed: 48MHz
• Oscillator Type: External Only
• No. Of Timers: 3
• Digital Ic Case Style: VFBGA
• Supply Voltage Range: 3V
• Controller Family/series: EZ-USB FX2LP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4611B - KIT USB TO ATA REFERENCE DESIGN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Document #: 38-08032 Rev. *K
Table 5-1. FX2LP Register Summary (continued)
Hex
E6A4 1
E6A5 1
E6A6 1
E6A7 1
E6A8 1
E6A9 1
E6AA 1
E6AB 1
E6AC 1
E6AD 1
E6AE 1
E6AF 1
E6B0 1
E6B1 1
E6B2 1
E6B3 1
E6B4 1
E6B5 1
E6B8 8
E6C0 1
E6C1 1
E6C2 1
E6C3 1
E6C4 1
E6C5 1
E6C6 1
E6C7 1
E6C8 1
E6C9 1
E6CA 1
E6CB 1
E6CC 1
E6CD 1
E6CE 1
E6CF 1
E6D0 1
E6D1 1
Size Name
2
2
EP4CS
EP6CS
EP8CS
EP2FIFOFLGS
EP4FIFOFLGS
EP6FIFOFLGS
EP8FIFOFLGS
EP2FIFOBCH
EP2FIFOBCL
EP4FIFOBCH
EP4FIFOBCL
EP6FIFOBCH
EP6FIFOBCL
EP8FIFOBCH
EP8FIFOBCL
SUDPTRH
SUDPTRL
SUDPTRCTL
reserved
SET-UPDAT
GPIF
GPIFWFSELECT
GPIFIDLECS
GPIFIDLECTL
GPIFCTLCFG
GPIFADRH
GPIFADRL
FLOWSTATE
FLOWSTATE
FLOWLOGIC
FLOWEQ0CTL
FLOWEQ1CTL
FLOWHOLDOFF
FLOWSTB
FLOWSTBEDGE
FLOWSTBPERIOD
GPIFTCB3
GPIFTCB2
GPIFTCB1
GPIFTCB0
reserved
[11]
[11]
[11]
[11]
[11]
[11]
Description
Endpoint 4 Control and
Status
Endpoint 6 Control and
Status
Endpoint 8 Control and
Status
Endpoint 2 slave FIFO
Flags
Endpoint 4 slave FIFO
Flags
Endpoint 6 slave FIFO
Flags
Endpoint 8 slave FIFO
Flags
Endpoint 2 slave FIFO
total byte count H
Endpoint 2 slave FIFO
total byte count L
Endpoint 4 slave FIFO
total byte count H
Endpoint 4 slave FIFO
total byte count L
Endpoint 6 slave FIFO
total byte count H
Endpoint 6 slave FIFO
total byte count L
Endpoint 8 slave FIFO
total byte count H
Endpoint 8 slave FIFO
total byte count L
Set-up Data Pointer high
address byte
Set-up Data Pointer low
address byte
Set-up Data Pointer Auto
Mode
8 bytes of set-up data
SET-UPDAT[0] =
SET-UPDAT[1] =
bmRequest
SET-UPDAT[2:3] = wVal-
ue
SET-UPDAT[4:5] = wInd-
ex
SET-UPDAT[6:7] =
wLength
Waveform Selector
GPIF Done, GPIF IDLE
drive mode
Inactive Bus, CTL states 0
CTL Drive Type
GPIF Address H
GPIF Address L
Flowstate Enable and
Selector
Flowstate Logic
CTL-Pin States in
Flowstate
(when Logic = 0)
CTL-Pin States in Flow-
state (when Logic = 1)
Holdoff Configuration
Flowstate Strobe
Configuration
Flowstate Rising/Falling
Edge Configuration
Master-Strobe Half-Period D7
GPIF Transaction Count
Byte 3
GPIF Transaction Count
Byte 2
GPIF Transaction Count
Byte 1
GPIF Transaction Count
Byte 0
bmRequestType
b7
0
0
0
0
0
0
0
0
BC7
0
BC7
0
BC7
0
BC7
A15
A7
0
D7
SINGLEWR1 SINGLEWR0 SINGLERD1 SINGLERD0 FIFOWR1
DONE
TRICTL
0
GPIFA7
FSE
LFUNC1
CTL0E3
CTL0E3
HOPERIOD3 HOPERIOD2 HOPERIOD1 HOPERIOD
SLAVE
0
TC31
TC23
TC15
TC7
b6
0
NPAK2
0
0
0
0
0
0
BC6
0
BC6
0
BC6
0
BC6
A14
A6
0
D6
0
0
0
0
GPIFA6
0
LFUNC0
CTL0E2
CTL0E2
RDYASYNC CTLTOGL
0
D6
TC30
TC22
TC14
TC6
b5
NPAK1
NPAK1
NPAK1
0
0
0
0
0
BC5
0
BC5
0
BC5
0
BC5
A13
A5
0
D5
0
CTL5
CTL5
0
GPIFA5
0
TERMA2
CTL0E1/
CTL5
CTL0E1/
CTL5
0
D5
TC29
TC21
TC13
TC5
b4
NPAK0
NPAK0
NPAK0
0
0
0
0
BC12
BC4
0
BC4
0
BC4
0
BC4
A12
A4
0
D4
0
CTL4
CTL4
0
GPIFA4
0
TERMA1
CTL0E0/
CTL4
CTL0E0/
CTL4
0
SUSTAIN
0
D4
TC28
TC20
TC12
TC4
b3
FULL
FULL
FULL
0
0
0
0
BC11
BC3
0
BC3
BC11
BC3
0
BC3
A11
A3
0
D3
0
CTL3
CTL3
0
GPIFA3
0
TERMA0
CTL3
CTL3
HOSTATE
0
0
D3
TC27
TC19
TC11
TC3
CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
b2
EMPTY
EMPTY
EMPTY
PF
PF
PF
PF
BC10
BC2
BC10
BC2
BC10
BC2
BC10
BC2
A10
A2
0
D2
FIFOWR0
0
CTL2
CTL2
0
GPIFA2
FS2
TERMB2
CTL2
CTL2
HOCTL2
MSTB2
0
D2
TC26
TC18
TC10
TC2
b1
0
0
0
EF
EF
EF
EF
BC9
BC1
BC9
BC1
BC9
BC1
BC9
BC1
A9
A1
0
D1
FIFORD1
0
CTL1
CTL1
0
GPIFA1
FS1
TERMB1
CTL1
CTL1
HOCTL1
MSTB1
FALLING
D1
TC25
TC17
TC9
TC1
b0
STALL
STALL
STALL
FF
FF
FF
FF
BC8
BC0
BC8
BC0
BC8
BC0
BC8
BC0
A8
0
SDPAUTO
D0
FIFORD0
IDLEDRV
CTL0
CTL0
GPIFA8
GPIFA0
FS0
TERMB0
CTL0
CTL0
HOCTL0
MSTB0
RISING
D0
TC24
TC16
TC8
TC0
Page 32 of 60
Default
00101000 rrrrrrrb
00000100 rrrrrrrb
00000100 rrrrrrrb
00000010 R
00000010 R
00000110 R
00000110 R
00000000 R
00000000 R
00000000 R
00000000 R
00000000 R
00000000 R
00000000 R
00000000 R
xxxxxxxx RW
xxxxxxx0 bbbbbbbr
00000001 RW
xxxxxxxx R
11100100 RW
10000000 RW
11111111 RW
00000000 RW
00000000 RW
00000000 RW
00000000 brrrrbbb
00000000 RW
00000000 RW
00000000 RW
00010010 RW
00100000 RW
00000001 rrrrrrbb
00000010 RW
00000000 RW
00000000 RW
00000000 RW
00000001 RW
00000000 RW
Access