EP4SGX290KF40C3N Altera, EP4SGX290KF40C3N Datasheet - Page 786

IC STRATIX IV GX 290K 1517FBGA

EP4SGX290KF40C3N

Manufacturer Part Number
EP4SGX290KF40C3N
Description
IC STRATIX IV GX 290K 1517FBGA
Manufacturer
Altera
Series
Stratix® IV GXr

Specifications of EP4SGX290KF40C3N

Number Of Logic Elements/cells
291200
Number Of Labs/clbs
11648
Total Ram Bits
17248
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1517-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2624

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3–32
Stratix IV Device Handbook Volume 2: Transceivers
1
Figure 3–17
after compilation.
Figure 3–17. Combining Basic (PMA Direct) ×1 and Non-Basic (PMA Direct) Instances in a
Transceiver Block After Compilation for Example 7
Key Observations
To combine the these instances, two CMU PLLs are required due to the different data
rates. Therefore, two CMU channels must be available to enable their respective CMU
PLLs. Note that inst3 uses the transmit side of the CMU channel that uses the CMU
PLL for clock generation.
shows Basic (PMA Direct) ×1 and non-Basic (PMA Direct) configurations
Chapter 3: Configuring Multiple Protocols and Data Rates in Stratix IV Devices
inst3: TX
RX
Inst0: Channel (GIGE)
RX
Inst1: Channel 1
Inst1: Channel 2
RX
RX
Inst1: Channel 0
(1.25 Gbps)
CMU PLL
Combining Transceiver Channels in Basic (PMA Direct) Configurations
GXBR
CMU PLL
(2 Gbps)
TX
TX
TX
TX
February 2011 Altera Corporation

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