EP4SGX290KF40C3N Altera, EP4SGX290KF40C3N Datasheet - Page 1019

IC STRATIX IV GX 290K 1517FBGA

EP4SGX290KF40C3N

Manufacturer Part Number
EP4SGX290KF40C3N
Description
IC STRATIX IV GX 290K 1517FBGA
Manufacturer
Altera
Series
Stratix® IV GXr

Specifications of EP4SGX290KF40C3N

Number Of Logic Elements/cells
291200
Number Of Labs/clbs
11648
Total Ram Bits
17248
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1517-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2624

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SIV53002-4.1
Stratix IV Device Handbook Volume 3
February 2011
February 2011
SIV53002-4.1
This chapter describes the Altera-recommended basic design flow that simplifies
Stratix
Use the following design flow techniques to simplify transceiver implementation. The
“Guidelines to Debug Transceiver-Based Designs” on page 2–14
to trouble-shoot transceiver-based designs. An example of a fibre channel protocol
application is also described in this chapter.
The transceiver-based design is divided into phases and are detailed in the following
sections:
Figure 2–1
design flow stages include architecture, functional simulation, compilation, and
verification. Each stage of the design flow is explained in the sections that follow.
“Architecture” on page 2–3
“Implementation and Integration” on page 2–6
“Compilation” on page 2–10
“Verification” on page 2–12
“Functional Simulation” on page 2–12
“Example 1: Fibre Channel Protocol Application” on page 2–17
®
IV GX transceiver-based designs.
shows the design flow chart of the different stages of the design flow. The
2. Transceiver Design Flow Guide for
Stratix IV Devices
provides guidelines
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