EP4SGX290KF40C3N Altera, EP4SGX290KF40C3N Datasheet - Page 624
![IC STRATIX IV GX 290K 1517FBGA](/photos/6/73/67341/ds-1517fbga-1_3_sml.jpg)
EP4SGX290KF40C3N
Manufacturer Part Number
EP4SGX290KF40C3N
Description
IC STRATIX IV GX 290K 1517FBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
Specifications of EP4SGX290KF40C3N
Number Of Logic Elements/cells
291200
Number Of Labs/clbs
11648
Total Ram Bits
17248
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1517-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2624
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- EP4SGX110DF29C3N PDF datasheet #3
- EP4SGX110DF29C3N PDF datasheet #4
- EP4SGX110DF29C3N PDF datasheet #5
- EP4SGX110DF29C3N PDF datasheet #6
- Current page: 624 of 1154
- Download datasheet (32Mb)
1–180
Figure 1–146. SDI Mode Datapath
Stratix IV Device Handbook Volume 2: Transceivers
1
1
tx_coreclk
rx_coreclk
Fabric
FPGA
FPGA Fabric-Transmitter
SDI Mode Datapath
Figure 1–146
The transmitter datapath, in HD-SDI configuration with 10-bit wide FPGA
fabric-transceiver interface, consists of the transmitter phase compensation FIFO and
the 10:1 serializer. The transmitter datapath, in HD-SDI and 3G-SDI configurations
with 20-bit wide FPGA fabric-transceiver interface, also includes the byte serializer.
In SDI mode, the transmitter is purely a parallel-to-serial converter. SDI transmitter
functions, such as scrambling and cyclic redundancy check (CRC) code generation,
must be implemented in the FPGA logic array.
In the 10-bit channel width SDI configuration, the receiver datapath is comprised of
the clock recovery unit (CRU), 1:10 deserializer, word aligner in bit-slip mode, and
receiver phase compensation FIFO. In the 20-bit channel width SDI configuration, the
receiver datapath also includes the byte deserializer.
SDI receiver functions, such as de-scrambling, framing, and CRC checker, must be
implemented in the FPGA logic array.
In SDI systems, the word aligner in the receiver datapath is not useful because word
alignment and framing happens after de-scrambling. Altera recommends driving the
ALTGX megafunction rx_bitslip signal low to avoid having the word aligner insert
bits in the received data stream.
FPGA Fabric-Receiver
Interface Clock
Interface Clock
Transmitter Datapath
Receiver Datapath
Receiver Word Alignment and Framing
shows the transceiver datapath when configured in SDI mode.
Compensation
tx_clkout
rx_clkout
RX Phase
FIFO
Compensation
wrclk
TX Phase
FIFO
rdclk
Transmitter Channel PCS
wrclk
Byte De-
serializer
Serializer
/2
Receiver Channel PCS
Byte
/2
rdclk
Low-Speed Parallel Clock
Recovered Clock
Parallel
Chapter 1: Transceiver Architecture in Stratix IV Devices
Word
Aligner
Serializer
Transmitter Channel PMA
Receiver Channel PMA
De-
Serializer
Divider
Clock
Local
February 2011 Altera Corporation
CDR
High-Speed
Serial Clock
Transceiver Block Architecture
Related parts for EP4SGX290KF40C3N
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![DK-CYCII-2C20N](/photos/9/20/92074/mfgdk-cycii-2c20nboard_tmb.jpg)
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610IPC-25](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-30](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-12](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10A](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![P85C224-66](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP320PC](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP2A15B724C7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-25T](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: