EP1S20F484C6N Altera, EP1S20F484C6N Datasheet - Page 643
EP1S20F484C6N
Manufacturer Part Number
EP1S20F484C6N
Description
IC STRATIX FPGA 20K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S20F484C6N
Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
361
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S20F484C6N
Manufacturer:
ALTERA
Quantity:
534
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Revision History
Altera Corporation
Chapter
8
9
September 2004, v1.2
September 2004, v1.1
November 2003, v1.1
April 2003, v1.0
April 2003, v1.0
July 2005, v2.0
July 2005, v2.0
Date/Version
This section provides documentation on some of the IP functions offered
by Altera
of the Altera web site for a complete offering of IP cores for Stratix
devices.) The last chapter details design considerations for migrating
from the APEX
This section contains the following chapters:
■
■
■
The table below shows the revision history for
Chapter 8, Implementing 10-Gigabit Ethernet Using Stratix &
Stratix GX Devices
Chapter 9, Implementing SFI-4 in Stratix & Stratix GX Devices
Chapter 10, Transitioning APEX Designs to Stratix & Stratix GX
Devices
Updated Stratix GX device information.
●
●
●
●
●
●
●
●
®
for Stratix
Table 8–2 on page
Note 2.
Updated
Removed support for series and parallel on-chip termination.
No new changes in Stratix Device Handbook v2.0.
Updated Stratix GX device information.
Table 9–2 on page
Note 2.
Updated
No new changes in Stratix Device Handbook v2.0.
™
architecture.
Table 8–4 on page
Table 9–4 on page
®
devices. (Also see the Intellectual Property section
Section V. IP & Design
8–10: updated table, deleted Note 1, and updated
9–9: updated table, deleted Note 1, and updated
Changes Made
8–12.
9–10.
Considerations
Chapters 8
through 10.
Section V–1
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