EP1S20F484C6N Altera, EP1S20F484C6N Datasheet - Page 574
![IC STRATIX FPGA 20K LE 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP1S20F484C6N
Manufacturer Part Number
EP1S20F484C6N
Description
IC STRATIX FPGA 20K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S20F484C6N
Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
361
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S20F484C6N
Manufacturer:
ALTERA
Quantity:
534
- Current page: 574 of 864
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Operational Modes
6–24
Stratix Device Handbook, Volume 2
Figure 6–13. Complex Multiplier Implemented Using Two-Multiplier Adder
Mode
Four-Multiplier Adder Mode
In the four-multiplier adder mode, which you can use for 1-dimensional
and 2-dimensional filtering applications, the DSP block adds the results
of two adder/subtractor/accumulators in a final stage (the summation
block).
1
9- & 18-Bit Summation Blocks
A single DSP block can implement one 18
blocks (see
must be the same size.
You can only use the adder block if it follows multiplication
operations.
Figure 6–14 on page
18
A
C
B
D
A
D
B
C
18
18
18
18
18
18
18
18
36
36
36
36
6–25). The multiplier product widths
Subtractor
Adder
DSP Block
37
37
18 or two 9
(Imaginary Part)
A
A
(Real Part)
C - B
D + B
Altera Corporation
D
9 summation
C
July 2005
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