LAN89218AQ Standard Microsystems (SMSC), LAN89218AQ Datasheet - Page 71
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LAN89218AQ
Manufacturer Part Number
LAN89218AQ
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN89218AQ.pdf
(155 pages)
Specifications of LAN89218AQ
Lead Free Status / RoHS Status
Compliant
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High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
Datasheet
SMSC LAN89218
3.13.4
3.13.5
Stopping and Starting the Receiver
To stop the receiver, the host must clear the RXEN bit in the MAC Control Register. When the receiver
is halted, the RXSTOP_INT will be pulsed. Once stopped, the host can optionally clear the RX status
and RX data FIFOs. The host must re-enable the receiver by setting the RXEN bit.
Receiver Errors
If the Receiver Error (RXE) flag is asserted for any reason, the receiver will continue operation. RX
Error (RXE) will be asserted under the following conditions:
It is the duty of the host to identify and resolve any error conditions.
A host underrun of RX data FIFO
A host underrun of the RX status FIFO
An overrun of the RX status FIFO
DATASHEET
71
Revision 1.3 (02-23-10)
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