LAN89218AQ Standard Microsystems (SMSC), LAN89218AQ Datasheet - Page 44

• Manufacturer Part Number: LAN89218AQ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN89218AQ

• Lead Free Status / RoHS Status: Compliant

High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
Datasheet
3.9.2.1
Supported EEPROM Operations
The EEPROM controller supports the following EEPROM operations under host control via the
E2P_CMD register. The operations are commonly supported by “93C46” EEPROM devices. A
description and functional timing diagram is provided below for each operation. Please refer to the
E2P_CMD register description in
Section 5.3.23, "E2P_CMD – EEPROM Command Register," on
page 107
for E2P_CMD field settings for each command.
ERASE (Erase Location): If erase/write operations are enabled in the EEPROM, this command will
erase the location selected by the EPC Address field (EPC_ADDR). The EPC_TO bit is set if the
EEPROM does not respond within 30 ms.
t
CSL
EECS
EECLK
EEDIO (OUTPUT)
1
1
1
A6
A0
EEDIO (INPUT)
Figure 3.12 EEPROM ERASE Cycle
ERAL (Erase All): If erase/write operations are enabled in the EEPROM, this command will initiate a
bulk erase of the entire EEPROM.The EPC_TO bit is set if the EEPROM does not respond within
30 ms.
t
CSL
EECS
EECLK
EEDIO (OUTPUT)
1
0
0
1
0
EEDIO (INPUT)
Figure 3.13 EEPROM ERAL Cycle
Revision 1.3 (02-23-10)
44
SMSC LAN89218
DATASHEET