LAN89218AQ Standard Microsystems (SMSC), LAN89218AQ Datasheet - Page 109

• Manufacturer Part Number: LAN89218AQ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN89218AQ

• Lead Free Status / RoHS Status: Compliant

High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
Datasheet
SMSC LAN89218
5.3.24
BITS
BITS
31:8
7:0
7:0
9
8
EPC Time-out.
response from the EEPROM within 30 ms, the EEPROM controller will time-
out and return to its idle state. This bit is set when a time-out occurs
indicating that the last operation was unsuccessful.
Note: If the EEDIO signal pin is externally pulled-high, EPC commands will
MAC Address Loaded.
was found, and that the MAC address programming has completed
normally. This bit is set after a successful load of the MAC address after
power-up, or after a RELOAD command has completed
EPC Address.
Controller to address the specific memory location in the Serial EEPROM.
This is a Byte aligned address.
Reserved
EEPROM Data. Value read from or written to the EEPROM.
E2P_DATA – EEPROM Data Register
This register is used in conjunction with the E2P_CMD register to perform read and write operations
with the Serial EEPROM.
Offset:
not time out if the EEPROM device is missing. In this case the EPC
Busy bit will be cleared as soon as the command sequence is
complete. It should also be noted that the ERASE, ERAL, WRITE
and WRAL commands are the only EPC commands that will time-
out if an EEPROM device is not present -and- the EEDIO signal is
pulled low
The 8-bit value in this field is used by the EEPROM
If an EEPROM operation is performed, and there is no
When set, this bit indicates that a valid EEPROM
DESCRIPTION
DESCRIPTION
B4h
DATASHEET
109
Size:
32 bits
R/WC
R/WC
TYPE
TYPE
R/W
R/W
RO
Revision 1.3 (02-23-10)
DEFAULT
DEFAULT
00h
00h
0
-
-