LAN89218AQ Standard Microsystems (SMSC), LAN89218AQ Datasheet - Page 67

• Manufacturer Part Number: LAN89218AQ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN89218AQ

• Lead Free Status / RoHS Status: Compliant

High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
Datasheet
SMSC LAN89218
3.13.1
It is possible to read multiple packets out of the RX data FIFO in one continuous stream. It should be
noted that the programmed Offset and Padding will be added to each individual packet in the stream,
since packet boundaries are maintained.
RX Slave PIO Operation
Using PIO mode, the host can either implement a polling or interrupt scheme to empty the received
packet out of the RX data FIFO. The host will remain in the idle state until it receives an indication
(interrupt or polling) that data is available in the RX data FIFO. The host will then read the RX status
FIFO to get the packet status, which will contain the packet length and any other status information.
The host should perform the proper number of reads, as indicated by the packet length plus the start
offset and the amount of optional padding added to the end of the frame, from the RX data FIFO.
Figure 3.25 Host Receive Routine Using Interrupts
Figure 3.26 Host Receive Routine with Polling
Last Packet
Last Packet
DATASHEET
RX_FIFO_
Read RX
Read RX
DWORD
Read RX
DWORD
Read RX
Packet
Status
Packet
Status
Read
Idle
init
init
INf
67
RX Interrupt
Valid Status DWORD
Not Last Packet
Not Last Packet
Revision 1.3 (02-23-10)