LAN9420I-NU Standard Microsystems (SMSC), LAN9420I-NU Datasheet - Page 135

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LAN9420I-NU

Manufacturer Part Number
LAN9420I-NU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9420I-NU

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
4.5
(IN DECIMAL)
INDEX
PHY Registers
17
18
27
29
30
31
0
1
2
3
4
5
6
The PHY registers are not memory mapped. These registers are accessed indirectly through the MAC
via the MII_ACCESS and MII_DATA registers. An index is used to access individual PHY registers.
PHY Register Indexes are shown in
Note: The NASR (Not Affected by Software Reset) designation is only applicable when bit 15 of
the PHY Basic Control Register (Reset) is set.
Basic Control Register
Basic Status Register
PHY Identifier 1
PHY Identifier 2
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Ability Register
Auto-Negotiation Expansion Register
Mode Control/Status Register
Special Modes
Control / Status Indication Register
Interrupt Source Register
Interrupt Mask Register
PHY Special Control/Status Register
Table 4.7 PHY Control and Status Registers
DATASHEET
Table 4.7, "PHY Control and Status Registers"
135
REGISTER NAME
Revision 1.4 (12-17-08)
below.

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