LAN9420I-NU Standard Microsystems (SMSC), LAN9420I-NU Datasheet - Page 115

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LAN9420I-NU

Manufacturer Part Number
LAN9420I-NU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9420I-NU

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
4.3.9
31:29
27:17
BITS
15:0
28
16
RESERVED
MIL RX FIFO Full Counter Overflow (MIL_OVER)
Overflow bit for the MIL_FIFO_FULL counter. This bit is automatically
cleared on a read.
MIL RX FIFO Full Counter (MIL_FIFO_FULL)
This field indicates the number of frames missed due a MIL RX FIFO full
condition. This counter is automatically cleared on a read.
RX Buffer Unavailable Counter Overflow (UNAV_OVER)
Overflow bit for the RX_BUFF_UNAV counter. This bit is automatically
cleared on a read.
RX Buffer Unavailable Counter (RX_BUFF_UNAV)
This field indicates the number of frames missed due to receive buffers
being unavailable. This counter is incremented each time the DMAC
discards an incoming frame. This counter is automatically cleared on a
read.
Missed Frame and Buffer Overflow Counter Reg (MISS_FRAME_CNTR)
The DMAC maintains two counters to track the number of missed frames during a receive operation.
The MISS_FRAME_CNTR register reports the current value of these counters and their overflow bits.
Offset:
DESCRIPTION
0020h
DATASHEET
115
Size:
32 bits
TYPE
RO
RC
RC
RC
RC
Revision 1.4 (12-17-08)
DEFAULT
0000h
000h
0b
0b
-

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