LAN9420I-NU Standard Microsystems (SMSC), LAN9420I-NU Datasheet - Page 108

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LAN9420I-NU

Manufacturer Part Number
LAN9420I-NU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9420I-NU

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Revision 1.4 (12-17-08)
4.3.5
BITS
31:4
3:0
Start of Transmit List (STL)
This field points to the start of the transmit buffer descriptor list. The
descriptor list resides in the Host memory. Writing this register is only valid
when the TX DMA engine is in the stopped state. When stopped, this
register must be written before the START command is given.
RESERVED
Transmit List Base Address Register (TX_BASE_ADDR)
This register specifies the start address of the transmit buffer list. TX_BASE_ADDR must be 4-DWORD
(16 byte) aligned (e.g. Reserved address bits 3:0 must be 0).
Offset:
DESCRIPTION
0010h
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
DATASHEET
108
Size:
32 bits
TYPE
SMSC LAN9420/LAN9420i
R/W
RO
DEFAULT
28‘h0
Datasheet
-

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