OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 93

• Manufacturer Part Number: OM13005,598
• Description: BOARD EVAL EM773 METER US PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13005,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6680

NXP Semiconductors
UM10415
User manual
9.6.18 UART RS-485 Address Match register (U0RS485ADRMATCH - 0x4000
9.6.19 UART1 RS-485 Delay value register (U0RS485DLY - 0x4000 8054)
9.6.20 RS-485/EIA-485 modes of operation
Table 108. UART RS485 Control register (U0RS485CTRL - address 0x4000 804C) bit
8050)
The U0RS485ADRMATCH register contains the address match value for RS-485/EIA-485
mode.
Table 109. UART RS-485 Address Match register (U0RS485ADRMATCH - address
The user may program the 8-bit RS485DLY register with a delay between the last stop bit
leaving the TXFIFO and the de-assertion of RTS (or DTR). This delay time is in periods of
the baud clock. Any delay time from 0 to 255 bit times may be programmed.
Table 110. UART RS-485 Delay value register (U0RS485DLY - address 0x4000 8054) bit
The RS-485/EIA-485 feature allows the UART to be configured as an addressable slave.
The addressable slave is one of multiple slaves controlled by a single master.
The UART master transmitter will identify an address character by setting the parity (9th)
bit to ‘1’. For data characters, the parity bit is set to ‘0’.
Each UART slave receiver can be assigned a unique address. The slave can be
programmed to either manually or automatically reject data following an address which is
not theirs.
Bit
31:6 -
Bit
7:0
31:8
Bit
7:0
31:8
Symbol
Symbol
DLY
-
Symbol
ADRMATCH
-
description
0x4000 8050) bit description
description
All information provided in this document is subject to legal disclaimers.
Description
Contains the direction control (RTS or DTR) delay value. This
register works in conjunction with an 8-bit counter.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Value
0
1
-
Rev. 1 — 10 September 2010
Chapter 9: EM773 Universal Asynchronous Transmitter (UART)
…continued
Description
Contains the address match value.
Reserved
Description
The direction control pin will be driven to logic ‘0’
when the transmitter has data to be sent. It will be
driven to logic ‘1’ after the last bit of data has been
transmitted.
The direction control pin will be driven to logic ‘1’
when the transmitter has data to be sent. It will be
driven to logic ‘0’ after the last bit of data has been
transmitted.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
UM10415
© NXP B.V. 2010. All rights reserved.
Reset value
0x00
-
Reset value
0x00
NA
Reset
value
NA
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