OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 68

• Manufacturer Part Number: OM13005,598
• Description: BOARD EVAL EM773 METER US PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13005,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6680

NXP Semiconductors
UM10415
User manual
8.3.5 GPIO interrupt event register
8.3.6 GPIO interrupt mask register
8.3.7 GPIO raw interrupt status register
Table 83.
Bits set to HIGH in the GPIOnIE register allow the corresponding pins to trigger their
individual interrupts and the combined GPIOnINTR line. Clearing a bit disables interrupt
triggering on that pin.
Table 84.
Bits read HIGH in the GPIOnIRS register reflect the raw (prior to masking) interrupt status
of the corresponding pins indicating that all the requirements have been met before they
are allowed to trigger the GPIOIE. Bits read as zero indicate that the corresponding input
pins have not initiated an interrupt. The register is read-only.
Table 85.
Bit
11:0
31:12
Bit
11:0
31:12
Bit
11:0
31:12
Symbol
IEV
-
Symbol Value Description
MASK
-
Symbol Value
RAWST
-
GPIOnIEV register (GPIO0IEV, address 0x5000 800C to GPIO3IEV, address 0x5003
800C) bit description
GPIOnIE register (GPIO0IE, address 0x5000 8010 to GPIO3IE, address 0x5003
8010) bit description
GPIOnIRS register (GPIO0IRS, address 0x5000 8014 to GPIO3IRS, address 0x5003
8014) bit description
All information provided in this document is subject to legal disclaimers.
0
1
-
0
1
-
Value
0
1
-
Rev. 1 — 10 September 2010
Selects interrupt on pin x to be masked (x = 0 to 11). 0x00
Interrupt on pin PIOn_x is masked.
Interrupt on pin PIOn_x is not masked.
Reserved
Description
Raw interrupt status (x = 0 to 11).
No interrupt on pin PIOn_x.
Interrupt requirements met on PIOn_x.
Reserved
Description
Selects interrupt on pin x to be triggered rising or
falling edges (x = 0 to 11).
Depending on setting in register GPIOnIS (see
Table
PIOn_x trigger an interrupt.
Depending on setting in register GPIOnIS (see
Table
PIOn_x trigger an interrupt.
Reserved
81), falling edges or LOW level on pin
81), rising edges or HIGH level on pin
Chapter 8: EM773 General Purpose I/O (GPIO)
UM10415
© NXP B.V. 2010. All rights reserved.
Reset
value
0x00
-
Reset
value
-
Reset
value
0x00
-
Access
R/W
-
Access
R/W
-
Access
R
-
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