OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 131
![BOARD EVAL EM773 METER US PLUG](/photos/38/74/387430/om13005_sml.jpg)
OM13005,598
Manufacturer Part Number
OM13005,598
Description
BOARD EVAL EM773 METER US PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13005,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6680
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NXP Semiconductors
UM10415
User manual
10.11.6.4 I
10.11.6.5 Bus error
10.11.7 I
An I
the bus. If the SCL line is obstructed (pulled LOW) by a device on the bus, no further serial
transfer is possible, and the problem must be resolved by the device that is pulling the
SCL bus line LOW.
Typically, the SDA line may be obstructed by another device on the bus that has become
out of synchronization with the current bus master by either missing a clock, or by sensing
a noise pulse as a clock. In this case, the problem can be solved by transmitting additional
clock pulses on the SCL line (see
dedicated timeout timer to detect an obstructed bus, but this can be implemented using
another timer in the system. When detected, software can force clocks (up to 9 may be
required) on SCL until SDA is released by the offending device. At that point, the slave
may still be out of synchronization, so a START should be generated to insure that all I
peripherals are synchronized.
A bus error occurs when a START or STOP condition is detected at an illegal position in
the format frame. Examples of illegal positions are during the serial transfer of an address
byte, a data bit, or an acknowledge bit.
The I
a master or an addressed slave. When a bus error is detected, the I
switches to the not addressed slave mode, releases the SDA and SCL lines, sets the
interrupt flag, and loads the status register with 0x00. This status code may be used to
vector to a state service routine which either attempts the aborted serial transfer again or
simply recovers from the error condition as shown in
This section provides examples of operations that must be performed by various I
service routines. This includes:
2
2
Fig 29. Recovering from a bus obstruction caused by a LOW level on SDA
•
•
•
C-bus obstructed by a LOW level on SCL or SDA
C state service routines
2
Initialization of the I
I
The 26 state service routines providing support for all four I
2
C-bus hang-up can occur if either the SDA or SCL line is held LOW by any device on
2
(1) Unsuccessful attempt to send a START condition.
(2) SDA line is released.
(3) Successful attempt to send a START condition. State 08H is entered.
C Interrupt Service
C hardware only reacts to a bus error when it is involved in a serial transfer either as
STA flag
SDA line
SCL line
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
2
C block after a Reset.
(1)
Figure
(1)
29). The I
Chapter 10: EM773 I2C-bus interface
2
(2)
C interface does not include a
Table
condition
135.
(3)
start
2
C operating modes.
2
C block immediately
UM10415
© NXP B.V. 2010. All rights reserved.
131 of 310
2
C state
2
C
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