OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 161

• Manufacturer Part Number: OM13005,598
• Description: BOARD EVAL EM773 METER US PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13005,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6680

NXP Semiconductors
Table 153. External Match Register (TMR16B0EMR - address 0x4000 C03C) bit description
Table 154. External match control
UM10415
User manual
Bit
0
1
2
3
5:4
7:6
9:8
11:10
31:12
EMR[11:10], EMR[9:8],
EMR[7:6], or EMR[5:4]
Symbol
EM0
EM1
EM2
EM3
EMC0
EMC1
EMC2
EMC3
-
12.8.11 Count Control Register (TMR16B0CTCR)
00
01
10
11
Description
External Match 0. This bit reflects the state of output CT16B0_MAT0, whether or not this
output is connected to its pin. When a match occurs between the TC and MR0, this bit can
either toggle, go LOW, go HIGH, or do nothing. Bits EMR[5:4] control the functionality of
this output. This bit is driven to the CT16B0_MAT0 pins if the match function is selected in
the IOCON registers (0 = LOW, 1 = HIGH).
External Match 1. This bit reflects the state of output CT16B0_MAT1, whether or not this
output is connected to its pin. When a match occurs between the TC and MR1, this bit can
either toggle, go LOW, go HIGH, or do nothing. Bits EMR[7:6] control the functionality of
this output. This bit is driven to the CT16B0_MAT1 pins if the match function is selected in
the IOCON registers (0 = LOW, 1 = HIGH).
External Match 2. This bit reflects the state of output match channel 2, whether or not this
output is connected to its pin. When a match occurs between the TC and MR2, this bit can
either toggle, go LOW, go HIGH, or do nothing. Bits EMR[9:8] control the functionality of
this output. Note that on counter/timer 0 this match channel is not pinned out. This bit is
driven to the CT16B0_MAT2 pin if the match function is selected in the IOCON registers (0
= LOW, 1 = HIGH).
External Match 3. This bit reflects the state of output of match channel 3. When a match
occurs between the TC and MR3, this bit can either toggle, go LOW, go HIGH, or do
nothing. Bits EMR[11:10] control the functionality of this output. There is no output pin
available for this channel on the 16-bit timer.
External Match Control 0. Determines the functionality of External Match 0.
shows the encoding of these bits.
External Match Control 1. Determines the functionality of External Match 1.
shows the encoding of these bits.
External Match Control 2. Determines the functionality of External Match 2.
shows the encoding of these bits.
External Match Control 3. Determines the functionality of External Match 3.
shows the encoding of these bits.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
The Count Control Register (CTCR) is used to select between Timer and Counter mode,
and in Counter mode to select the pin and edge(s) for counting.
When Counter Mode is chosen as a mode of operation, the CAP input (selected by the
CTCR bits 3:2) is sampled on every rising edge of the PCLK clock. After comparing two
consecutive samples of this CAP input, one of the following four events is recognized:
Function
Do Nothing.
Clear the corresponding External Match bit/output to 0 (CT16Bn_MATm pin is LOW if
pinned out).
Set the corresponding External Match bit/output to 1 (CT16Bn_MATm pin is HIGH if
pinned out).
Toggle the corresponding External Match bit/output.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
Chapter 12: EM773 16-bit counter/timer (CT16B0)
Table 154
Table 154
Table 154
Table 154
UM10415
© NXP B.V. 2010. All rights reserved.
Reset
value
0
0
0
0
00
00
00
00
NA
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