OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 243

• Manufacturer Part Number: OM13005,598
• Description: BOARD EVAL EM773 METER US PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13005,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6680

NXP Semiconductors
UM10415
User manual
20.3.4.1 Lockup
20.3.4 Fault handling
not a normal branch operation and, instead, that the exception is complete. Therefore, it
starts the exception return sequence. Bits[3:0] of the EXC_RETURN value indicate the
required return stack and processor mode, as
Table 226. Exception return behavior
Faults are a subset of exceptions, see
exception being taken or cause lockup if they occur in the NMI or HardFault handler. The
faults are:
Remark: Only Reset and NMI can preempt the fixed priority HardFault handler. A
HardFault can preempt any exception other than Reset, NMI, or another hard fault.
The processor enters a lockup state if a fault occurs when executing the NMI or HardFault
handlers, or if the system generates a bus error when unstacking the PSR on an
exception return using the MSP. When the processor is in lockup state it does not execute
any instructions. The processor remains in lockup state until one of the following occurs:
EXC_RETURN
0xFFFFFFF1
0xFFFFFFF9
0xFFFFFFFD
All other values
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•
•
•
•
•
•
•
•
•
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execution of an SVC instruction at a priority equal or higher than SVCall
execution of a BKPT instruction without a debugger attached
a system-generated bus error on a load or store
execution of an instruction from an XN memory address
execution of an instruction from a location for which the system generates a bus fault
a system-generated bus error on a vector fetch
execution of an Undefined instruction
execution of an instruction when not in Thumb-State as a result of the T-bit being
previously cleared to 0
an attempted load or store to an unaligned address.
it is reset
a debugger halts it
an NMI occurs and the current lockup is in the HardFault handler.
All information provided in this document is subject to legal disclaimers.
Description
Return to Handler mode.
Exception return gets state from the main stack.
Execution uses MSP after return.
Return to Thread mode.
Exception return gets state from MSP.
Execution uses MSP after return.
Return to Thread mode.
Exception return gets state from PSP.
Execution uses PSP after return.
Reserved.
Rev. 1 — 10 September 2010
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
Section
Table 20–226
20–20.3.3. All faults result in the HardFault
shows.
UM10415
© NXP B.V. 2010. All rights reserved.
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