OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 237
![BOARD EVAL EM773 METER US PLUG](/photos/38/74/387430/om13005_sml.jpg)
OM13005,598
Manufacturer Part Number
OM13005,598
Description
BOARD EVAL EM773 METER US PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13005,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6680
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NXP Semiconductors
UM10415
User manual
20.3.2.5.1 Little-endian format
20.3.2.5 Memory endianness
20.3.3.1 Exception states
20.3.3 Exception model
Vector table — If the program changes an entry in the vector table, and then enables the
corresponding exception, use a DMB instruction between the operations. This ensures that
if the exception is taken immediately after being enabled the processor uses the new
exception vector.
Self-modifying code — If a program contains self-modifying code, use an ISB instruction
immediately after the code modification in the program. This ensures subsequent
instruction execution uses the updated program.
Memory map switching — If the system contains a memory map switching mechanism,
use a DSB instruction after switching the memory map. This ensures subsequent
instruction execution uses the updated memory map.
Memory accesses to Strongly-ordered memory, such as the System Control Block, do not
require the use of DMB instructions.
The processor preserves transaction order relative to all other transactions.
The processor views memory as a linear collection of bytes numbered in ascending order
from zero. For example, bytes 0-3 hold the first stored word, and bytes 4-7 hold the
second stored word.
memory.
In little-endian format, the processor stores the least significant byte (lsbyte) of a word at
the lowest-numbered byte, and the most significant byte (msbyte) at the
highest-numbered byte. For example:
This section describes the exception model.
Each exception is in one of the following states:
Inactive — The exception is not active and not pending.
Pending — The exception is waiting to be serviced by the processor.
Fig 57. Little-endian format
Address
All information provided in this document is subject to legal disclaimers.
Section 20–20.3.2.5.1
Rev. 1 — 10 September 2010
A+1
A+2
A+3
A
7
Memory
B0
B1
B2
B3
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
0
lsbyte
msbyte
describes how words of data are stored in
31
B3
24 23
B2
Register
16 15
B1
8 7
UM10415
B0
© NXP B.V. 2010. All rights reserved.
0
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