IP-CPRI Altera, IP-CPRI Datasheet - Page 138

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

7–8
CPRI MegaCore Function User Guide
5. If you are using the ModelSim SE or ModelSim AE simulator, turn off simulation
6. In the ModelSim simulator, change directories to your testbench directory,
7. To compile and run the appropriate testbench for the DUT you generated in step 2,
The input to and subsequent output data from each of the AUX, map0, and MII
interfaces is visible in the waveform for testbenches that have the relevant interface.
optimization by performing the following steps:
a. In the ModelSim simulator, on the Compile menu, click Compile Options. The
b. Perform one of the following actions:
c. Click Apply.
d. Click OK.
<working directory>/cpri_top_level_testbench/altera_cpri.
using the ModelSim simulator, type the following command:
do compile[_<variation>]_<HDL>.do r
Compiler Options dialog box appears.
i. If you are using the ModelSim SE simulator, on the VHDL tab and on the
ii. If you are using the ModelSim AE simulator, on the VHDL tab and on the
Verilog & System Verilog tab, turn off Use vopt flow and turn on Disable
optimizations by using -O0.
Verilog & System Verilog tab, turn on Disable optimizations by using
-O0.
May 2011 Altera Corporation
Chapter 7: Testbenches
Running the Testbenches