IP-CPRI Altera, IP-CPRI Datasheet - Page 131

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Table 7–1. Additional Functions Demonstrated by Individual Testbenches
May 2011 Altera Corporation
Testbench
tb_altera_cpri.vhd
tb_altera_cpri_mii.vhd
tb_altera_cpri_mii_noiq.vhd
tb_altera_cpri_autorate.vhd
tb_altera_cpri_c4gx_autorate.vhd
1
The Altera CPRI IP core includes five demonstration testbenches for your use. The
testbenches provide examples of how to use the Avalon-MM and Avalon-ST interfaces
to generate and process CPRI transactions using the MII, MAP, and AUX interfaces
and how to perform autorate negotiation.
The testbenches are available only if you turn on Generate Example Design when
prompted during generation of the CPRI IP core. Refer to
page
All five demonstration testbenches demonstrate the following functions:
■
■
■
In addition, the individual testbenches demonstrate the functions shown in
Each testbench consists of a CPRI IP core and a testbench that initializes the CPRI IP
core and sends the generated data to the CPRI IP core interfaces listed in
the testbenches, the CPRI IP core’s high-speed transceiver output is looped back to its
high-speed transceiver input. The testbench module provides clocking, reset, and
initialization control, and processes to write to and read from the IP core’s interfaces.
The initialization process requires that the testbench module write to and read from
the CPRI IP core registers through its CPU interface.
Writing to the registers
Frame synchronization process
Transmission and reception of CPRI link data
2–1.
Transmission and Reception of Data on Interface
Antenna-Carrier
v
v
—
—
—
MII
—
v
v
—
—
“Specifying Parameters” on
AUX
v
v
v
—
—
CPRI MegaCore Function User Guide
7. Testbenches
Negotiation of CPRI
Line Rate
Autorate
Table
—
—
—
v
v
Table
7–1. In
7–1.