IP-CPRI Altera, IP-CPRI Datasheet - Page 10
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IP-CPRI
Manufacturer Part Number
IP-CPRI
Description
IP CORE - Common Public Radio Interface (CPRI)
Manufacturer
Altera
Specifications of IP-CPRI
Software Application
IP CORE, Interface And Protocols, HIGH SPEED
Supported Families
Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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1–4
Device Family Support
Table 1–1. Altera IP Core Device Support Levels
MegaCore Verification
Performance and Resource Utilization
CPRI MegaCore Function User Guide
Preliminary support—The IP core is verified with
preliminary timing models for this device family. The IP core
meets all functional requirements, but might still be
undergoing timing analysis for the device family. It can be
used in production designs with caution.
Final support—The IP core is verified with final timing
models for this device family. The IP core meets all
functional and timing requirements for the device family and
can be used in production designs.
FPGA Device Families
Table 1–1
Table 1–2
family.
Table 1–2. Device Family Support
Before releasing a version of the CPRI IP core, Altera runs comprehensive regression
tests in the current version of the Quartus
MegaWizard
simulation and hardware to confirm functionality.
Altera tests and verifies the CPRI IP core in hardware, especially the deterministic
latency feature, for different platforms and environments.
This section contains tables showing IP core variation size and performance examples.
Table 1–3
CPRI IP core variations.
All of these variations are in REC master mode and have autorate negotiation turned
off.
Arria
Arria II GZ
Cyclone
HardCopy
Stratix
Other device families
®
®
II GX
®
IV GX
®
IV GX
defines the device support levels for Altera IP cores.
lists the level of support offered by the CPRI IP core for each Altera device
and
IV GX
™
Table 1–4
Plug-In Manager to create the instance files. Altera tests these files in
Device Family
list the resources and expected performance for different
HardCopy Companion—The IP core is verified with
preliminary timing models for the HardCopy companion
device. The IP core meets all functional requirements, but
might still be undergoing timing analysis for the HardCopy
device family. It can be used in production designs with
caution.
HardCopy Compilation—The IP core is verified with final
timing models for the HardCopy device family. The IP core
meets all functional and timing requirements for the device
family and can be used in production designs.
®
II software. These tests use the
Final
Final
Final
HardCopy Compilation
Final
No support
HardCopy Device Families
Chapter 1: About This MegaCore Function
Support
May 2011 Altera Corporation
Device Family Support
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