XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 243

• Manufacturer Part Number: XC68HC12A0CPV8
• Description: IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
• Manufacturer: Freescale Semiconductor

Specifications of XC68HC12A0CPV8

• Controller Family/series: 68HC12
• No. Of I/o's: 68
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Core Size: 16 Bit
• Program Memory Size: 60KB
• Peripherals: ADC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TC6 — Timer Input Capture/Output Compare Register 6
TC7 — Timer Input Capture/Output Compare Register 7
PACTL — 16-Bit Pulse Accumulator A Control Register
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
RESET:
BIT 7
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
0
0
PAEN
14
14
6
0
6
6
6
6
16-Bit Pulse Accumulator A (PACA) is formed by cascading the 8-bit
pulse accumulators PAC3 and PAC2.
When PAEN is set, the PACA is enabled. The PACA shares the input pin
with IC7.
Read: any time
Write: any time
Depending on the TIOS bit for the corresponding channel, these
registers are used to latch the value of the free-running counter when
a defined transition is sensed by the corresponding input capture
edge detector or to trigger an output action for output compare.
Read anytime. Write anytime for output compare function. Writes to
these registers have no meaning or effect during input capture. All
timer input capture/output compare registers are reset to $0000.
PAMOD
13
13
5
0
5
5
5
5
Enhanced Capture Timer
PEDGE
12
12
4
0
4
4
4
4
CLK1
11
11
3
0
3
3
3
3
CLK0
10
10
2
0
2
2
2
2
PAOVI
1
0
1
9
1
1
9
1
Enhanced Capture Timer
BIT 0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 8
Bit 0
PAI
0
Timer Registers
Technical Data
$009C–$009D
$009E–$009F
$00A0
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