XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 134

• Manufacturer Part Number: XC68HC12A0CPV8
• Description: IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
• Manufacturer: Freescale Semiconductor

Specifications of XC68HC12A0CPV8

• Controller Family/series: 68HC12
• No. Of I/o's: 68
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Core Size: 16 Bit
• Program Memory Size: 60KB
• Peripherals: ADC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I/O Ports with Key Wake-up
KWIFH — Key Wake-up Port H Flag Register
10.4 Key Wake-Up Input Filter
Technical Data
134
RESET:
KWIFH7
Bit 7
0
KWIFH6
6
0
Read and write anytime.
Each flag is set by a falling edge on its associated input pin. To clear the
flag, write one to the corresponding bit in KWIFH.
KWIFH[7:0] — Key Wake-up Port H Flags
The KWU input signals are filtered by a digital filter which is active only
during STOP mode. The purpose of the filter is to prevent single pulses
shorter than a specified value from waking the part from STOP.
The filter is composed of an internal oscillator and a majority voting logic.
The filter oscillator starts the oscillation by detecting a triggering edge on
an input if the corresponding interrupt enable bit is set. The majority
voting logic takes three samples of an asserted input pin at each filter
oscillator period and if two samples are taken at the triggering level, the
filter recognizes a valid triggering level and sets the corresponding
interrupt flag. In this way the majority voting logic rejects the short non-
triggering state between two incoming triggering pulses. As the filter is
shared with all KWU inputs, the filter considers any pulse coming from
any input pin for which the corresponding interrupt enable bit is set.
The timing specification is given for a single pulse. The time interval
between the triggering edges of two following pulses should be greater
than the t
0 = Falling edge on the associated bit has not occurred
1 = Falling edge on the associated bit has occurred (an interrupt
KWIFH5
5
0
KWSP
will occur if the associated enable bit is set)
I/O Ports with Key Wake-up
in order to be considered as a single pulse by the filter. If
KWIFH4
4
0
KWIFH3
3
0
KWIFH2
2
0
KWIFH1
MC68HC912D60A — Rev. 3.1
1
0
Freescale Semiconductor
KWIFH0
Bit 0
0
$002F