UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 527

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
<R>
(3) Priority specification flag registers (PR0L, PR0H, PR1L, PR1H)
The priority specification flag registers are used to set the corresponding maskable interrupt priority order.
PR0L, PR0H, PR1L, and PR1H are set by a 1-bit or 8-bit memory manipulation instruction. If PR0L and PR0H,
and PR1L and PR1H are combined to form 16-bit registers PR0 and PR1, they are set with a 16-bit memory
manipulation instruction.
Reset signal generation sets these registers to FFH.
Address: FFE8H
Symbol
PR0L
Address: FFE9H
Symbol
PR0H
Address: FFEAH
Symbol
PR1L
Address: FFEBH
Symbol
PR1H
Caution Be sure to set bit 5 to 7 of PR1H to 1.
Figure 17-4. Format of Priority Specification Flag Registers (PR0L, PR0H, PR1L, PR1H)
C0ERRPR
DUALPR1
DUALPR7
SRPR61
DMUPR
XXPRX
WTIPR
PPR6
<7>
<7>
<7>
7
1
0
1
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
High priority level
Low priority level
DURLPR0
DUALPR6
TMPR073
SREPR61
CSIPR10
ADPR
PPR5
<6>
<6>
<6>
6
1
CHAPTER 17 INTERRUPT FUNCTIONS
R/W
R/W
R/W
R/W
DUALPR5
TMPR003
TMPR010
STPR60
PPR4
<5>
<5>
<5>
User’s Manual U17554EJ4V0UD
5
1
DUALPR4
TMPR012
TMPR000
TMPR011
SRPR60
PPR3
<4>
<4>
<4>
<4>
Priority level selection
DUALPR3
TMPR002
SREPR60
TMPR001
TMPR50
PPR2
<3>
<3>
<3>
<3>
C0TRXPR
CSIPR11
TMPRH0
PPR1
<2>
<2>
<2>
<2>
C0RECPR
TMPRH1
WTPR
PPR0
<1>
<1>
<1>
<1>
C0WUPPR
DUALPR2
TMPR51
STPR61
LVIPR
PPR7
<0>
<0>
<0>
<0>
527

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