UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 278

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

11.4.3 Setting window open period of watchdog timer
byte (0080H). The outline of the window is as follows.
278
Set the window open period of the watchdog timer by using bits 6 and 5 (WINDOW1, WINDOW0) of the option
• If “ACH” is written to WDTE during the window open period, the watchdog timer is cleared and starts counting
• Even if “ACH” is written to WDTE during the window close period, an abnormality is detected and an internal
The window open period to be set is as follows.
Counting
Example: If the window open period is 25%
starts
Caution The first writing to WDTE after a reset release clears the watchdog timer, if it is made before the
again.
reset signal is generated.
Cautions 1. The combination of WDCS2 = WDCS1 = WDCS0 = 0 and WINDOW1 =
WINDOW1
overflow time regardless of the timing of the writing, and the watchdog timer starts counting
again.
0
0
1
1
Internal reset signal is generated
if ACH is written to WDTE.
Window close period (75%)
2. The watchdog timer continues its operation during self-programming and
Table 11-4. Setting Window Open Period of Watchdog Timer
WINDOW0 = 0 is prohibited.
EEPROM emulation of the flash memory.
interrupt acknowledge time is delayed. Set the overflow time and window
size taking this delay into consideration.
WINDOW0
0
1
0
1
25%
50%
75%
100%
CHAPTER 11 WATCHDOG TIMER
User’s Manual U17554EJ4V0UD
Window Open Period of Watchdog Timer
Counting starts again when
ACH is written to WDTE.
Window open
period (25%)
Overflow
time
During processing, the