UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 174

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

174
Note The TI002 pin valid edge is set by bits 5 and 4 (ES021, ES020) of prescaler mode register 02 (PRM02).
Remark TO02: 16-bit timer/event counter 02 output pin
Address: FF54H
Symbol
TMC02
TI002: 16-bit timer/event counter 02 input pin
TM02: 16-bit timer counter 02
CR002: 16-bit timer capture/compare register 002
CR012: 16-bit timer capture/compare register 012
OVF02 is set to 1 when the value of TM02 changes from FFFFH to 0000H in all the operation modes (free-running
timer mode, clear & start mode entered by TI002 pin valid edge input, and clear & start mode entered upon a match
between TM02 and CR002).
It can also be set to 1 by writing 1 to OVF02.
Clear (0)
TMC023
TMC021
OVF02
Set (1)
0
0
1
1
0
1
Figure 7-10. Format of 16-Bit Timer Mode Control Register 02 (TMC02)
7
0
After reset: 00H
• Match between TM02 and CR002 or match between TM02 and CR012
• Match between TM02 and CR002 or match between TM02 and CR012
• Trigger input of TI002 pin valid edge
Clears OVF02 to 0 or TMC023 and TMC022 = 00
Overflow occurs.
TMC022
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 TO 03
0
1
0
1
6
0
Disables 16-bit timer/event counter 02 operation. Stops supplying operating clock.
Clears 16-bit timer counter 02 (TM02).
Free-running timer mode
Clear & start mode entered by TI002 pin valid edge input
Clear & start mode entered upon a match between TM02 and CR002
R/W
User’s Manual U17554EJ4V0UD
5
0
Condition to reverse timer output (TO02)
Operation enable of 16-bit timer/event counter 01
4
0
TM02 overflow flag
TMC023
3
TMC022
2
Note
TMC021
1
OVF02
<0>