UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 315

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(1) Receive buffer register 6n (RXB6n)
(2) Receive shift register 6n (RXS6n)
(3) Transmit buffer register 6n (TXB6n)
(4) Transmit shift register 6n (TXS6n)
Remark n = 0, 1
This 8-bit register stores parallel data converted by receive shift register 6n (RXS6n).
Each time 1 byte of data has been received, new receive data is transferred to this register from RXS6n. If the
data length is set to 7 bits, data is transferred as follows.
• In LSB-first reception, the receive data is transferred to bits 0 to 6 of RXB6n and the MSB of RXB6n is always 0.
• In MSB-first reception, the receive data is transferred to bits 1 to 7 of RXB6n and the LSB of RXB6n is always 0.
If an overrun error (OVE6n) occurs, the receive data is not transferred to RXB6n.
RXB6n can be read by an 8-bit memory manipulation instruction. No data can be written to this register.
Reset signal generation sets this register to FFH.
This register converts the serial data input to the R
RXS6n cannot be directly manipulated by a program.
This buffer register is used to set transmit data. Transmission is started when data is written to TXB6n.
This register can be read or written by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
This register transmits the data transferred from TXB6n from the TxD6n pins as serial data. Data is transferred
from TXB6n immediately after TXB6n is written for the first transmission, or immediately before INTST6n occurs
after one frame was transmitted for continuous transmission. Data is transferred from TXB6n and transmitted
from the T
TXS6n cannot be directly manipulated by a program.
Cautions 1. Do not write data to TXB6n when bit 1 (TXBF6n) of asynchronous serial interface
X
D6n pins at the falling edge of the base clock.
2. Do not refresh (write the same value to) TXB6n by software during a communication
3. Set transmit data to TXB6n at least one base clock (f
transmission status register 6n (ASIF6n) is 1.
operation (when bits 7 and 6 (POWER6n, TXE6n) of asynchronous serial interface
operation mode register 6n (ASIM6n) are 1 or when bits 7 and 5 (POWER6n, RXE6n) of
ASIM6n are 1).
CHAPTER 14 SERIAL INTERFACES UART60 AND UART61
User’s Manual U17554EJ4V0UD
X
D6n pins into parallel data.
XCLK6
) after setting TXE6n = 1.
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