UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 177

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
Remark n = 0 to 3
Note When the valid edge is detected from the TI011 pin, the capture operation is not performed but the
Caution To ensure that the capture operation is performed properly, the capture trigger requires a pulse
Address: FFB8H
Symbol
CRC01
INTTM001 signal is generated as an external interrupt signal.
two cycles longer than the count clock selected by prescaler mode register 01 (PRM01) (see
Figure 7-13 Example of CR01n Capture Operation (When Rising Edge Is Specified)).
Figure 7-13. Example of CR01n Capture Operation (When Rising Edge Is Specified)
Rising edge detection
The valid edge of the TI011 and TI001 pin is set by PRM01.
If ES011 and ES010 are set to 11 (both edges) when CRC011 is 1, the valid edge of the TI001 pin cannot
be detected.
If TMC013 and TMC012 are set to 11 (clear & start mode entered upon a match between TM01 and
CR001), be sure to set CRC010 to 0.
CRC012
CRC011
CRC010
Figure 7-14. Format of Capture/Compare Control Register 01 (CRC01)
7
0
0
1
0
1
0
1
After reset: 00H
Count clock
INTTM01n
Operates as compare register
Operates as capture register
Captures on valid edge of TI011 pin
Captures on valid edge of TI001 pin by reverse phase
Operates as compare register
Operates as capture register
CR01n
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 TO 03
TM0n
TI00n
6
0
R/W
N
User’s Manual U17554EJ4V0UD
5
0
3
CR011 operating mode selection
CR001 operating mode selection
N
CR001 capture trigger selection
4
0
2
N
3
0
1
Valid edge
Note
CRC012
2
N
N
CRC011
N + 1
1
CRC010
0
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