UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 253

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

frequency is f
If the setting value of the CMP0n register is N, the setting value of the CMP1n register is M, and the count clock
<2> The count operation starts when TMHEn = 1.
<3> The CMP0n register is the compare register that is to be compared first after counter operation is enabled.
<4> When 8-bit timer counter Hn and the CMP1n register match, TOHn output becomes inactive and the
<5> By performing procedures <3> and <4> repeatedly, a pulse with an arbitrary duty can be obtained.
<6> To stop the count operation, set TMHEn = 0.
Cautions 1. In PWM output mode, three operation clocks (signal selected using the CKSn2 to CKSn0
Remark n = 0, 1
When the values of 8-bit timer counter Hn and the CMP0n register match, 8-bit timer counter Hn is cleared,
an interrupt request signal (INTTMHn) is generated, and TOHn output becomes active. At the same time,
the compare register to be compared with 8-bit timer counter Hn is changed from the CMP0n register to the
CMP1n register.
compare register to be compared with 8-bit timer counter Hn is changed from the CMP1n register to the
CMP0n register.
generated.
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2. Be sure to set the CMP1n register when starting the timer count operation (TMHEn = 1) after
, the PWM pulse output cycle and duty are as follows.
PWM pulse output cycle = (N + 1)/f
Duty = Active width : Total width of PWM = (M + 1) : (N + 1)
bits of the TMHMDn register) are required to transfer the CMP1n register value after
rewriting the register.
the timer count operation was stopped (TMHEn = 0) (be sure to set again even if setting the
same value to the CMP1n register).
At this time, 8-bit timer counter Hn is not cleared and the INTTMHn signal is not
CHAPTER 9 8-BIT TIMERS H0 AND H1
User’s Manual U17554EJ4V0UD
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