SC900841JVKR2 Freescale Semiconductor, SC900841JVKR2 Datasheet - Page 99

• Manufacturer Part Number: SC900841JVKR2
• Description: IC POWER MGT 338-MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of SC900841JVKR2

• Applications: PC's, PDA's
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 338-TBGA
• Input Voltage: 2.8 V to 4.4 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Voltage - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 53. VCCPDDR Control Register Structure and Bits Description
VCCPAOAC Status/Control Registers and Bits Description
Table 52. VCCPAOACCNT Register Structure and Bits Description
VCCPDDR
with a P-CH Pass FET. It is high performance, low noise, and
high PSRR, with a low quiescent current and fast transient
response. VCCPDDR is actively discharged during shutdown.
Main Features
• Uses V15 as the main power supply
• 60 mA maximum continuous output current
• Optimized for a 1.0 µF external filter capacitor with a
Analog Integrated Circuit Device Data
Freescale Semiconductor
AOACCTLVCCPAOAC
VCCPDDR is a low drop-out (LDO) fully integrated regulator
maximum of 10 mΩ ESR
CTLVCCPDDR
CTLVCCPAOAC
Reserved
Name
Name
V
OCCPDDR
C
(Shared with VCCPAOAC, VAON ,
(Shared with VCCPAOAC, VAON ,
OCCPDDR
Bits
2:0
Bits
2:0
5:3
7:6
VOUTCCPDDR
VMM, and VCCP )
VMM, and VCCP)
FBCCPDDR
VCCPDDR State Control
x0 = Reserved
x1 = Reserved
x2 = Reserved
x3 = Reserved
GND1P5
VCCPAOAC State Control
x0 = Reserved
x1 = Reserved
x2 = Reserved
x3 = Reserved
VCCPAOAC State Control during AOAC Exit (when the Exit pin is EXITSTBY pin is asserted). These bits will
be initialized by the system SPI controller after power up.
X0 = Do not copy
x1 = Do not copy
x2 = Do not copy
x3 = Do not copy
Reserved
PVIN 1P5
Figure 52. VCCPDDR Detailed Internal Block Diagram
VCCPAOACCNT (ADDR 0x3D - R/W - Default Value: 0x07)
VCCPDDRCNT (ADDR 0x3E - R/W - Default value: 0x3C)
V
I
OCCPDDR
OCCPDDR
Discharge
Controller
Z
Output Monitor
_
+
reference ground pin (GND1P5) with the VCCPAOAC, VAON,
VMM, and VCCP regulators, yet each has independent control.
PVIN1P5 is supplied from the V15 voltage.
• Uses an internal pass FET
• The output for each LDO is monitored for over-current
VCCPDDR Status/Control Registers and Bits Description
VCCPDDR shares an input voltage pin (PVIN1P5) and a
conditions and under-voltage events
V
REF
Description
Description
x4 = OFF
x5 = Low Power
x6 = Active
x7 = Active
x4 = OFF
x5 = Low Power
x6 = Active
x7 = Active
x4 = OFF
x5 = Low Power
x6 = Active
x7 = Active
AOACCTLVCCPDDR
VCCPDDRFAULT
CTLVCCPDDR
FUNCTIONAL DEVICE OPERATION
Interface
SPI
POWER SUPPLIES
900841
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