SC900841JVKR2 Freescale Semiconductor, SC900841JVKR2 Datasheet - Page 104

• Manufacturer Part Number: SC900841JVKR2
• Description: IC POWER MGT 338-MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of SC900841JVKR2

• Applications: PC's, PDA's
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 338-TBGA
• Input Voltage: 2.8 V to 4.4 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Voltage - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

VIMG28
with a P-CH Pass FET. It is high performance, low noise, and
high PSRR, with a low quiescent current and fast transient
response. VIMG28 is actively discharged during shutdown.
reference ground pin (GNDIMG) with the VIMG25 regulator,
yet each has independent control. Both can be supplied by
either the V33 output voltage or directly from the V
depending on its output voltage selections. It is
recommended to supply VIMG28 from V33 at all times,
regardless of the VIMG28 output voltage setting. This LDO is
Main Features
• Uses V33 or VPWR as the main power supply
• 225 mA maximum continuous output current
• Optimized for a 2.2 µF external filter capacitor with a
104
Table 58. VIMG28 Control Register Structure and Bits Description
900841
FUNCTIONAL DEVICE OPERATION
POWER SUPPLIES
AOACCTLVIMGA
VIMG28 is a low drop-out (LDO) fully integrated regulator
VIMG28 shares an input voltage pin (PVINIMG) and a
maximum of 10 mΩ ESR
CTLVIMGA
SELVIMGA
Name
V
OIMG 28
Bits
2:0
5:3
7:6
(Shared with VIMG 25)
(Shared with VIMG 25)
C
VIMG28 State Control
x0 = Reserved
x1 = Reserved
x2 = Reserved
x3 = Reserved
VIMG28 State Control during AOAC Exit (when the Exit pin is EXITSTBY pin is asserted). These bits will be
initialized by the system SPI controller after power up.
X0 = Do not copy
x1 = Do not copy
x2 = Do not copy
x3 = Do not copy
VIMG28 output voltage selections:
X0 = 1.5 V
x1 = 2.7 V
x2 = 2.8 V
x3 = 2.9 V
VOUTIMG28
OIMG 28
GNDIMG
PVINIMG
Figure 57. VIMG28 Detailed Internal Block Diagram
VIMGACNT (ADDR 0x0x48 - R/W - Default Value: 0x24)
Discharge
V
I
OIMG28
OIMG28
PWR
Controller
node,
Z
Output Monitor
_
+
V
optimized to work with 300 mV headroom, which leaves
enough margin between the input and the highest output of
this LDO. If it is desired to supply these LDO directly from
VPWR, two notes are worth mentioning:
• Users are encouraged to take the resulting thermal
• At high VIMG28 output voltage selections, the output will
• Uses internal pass FET
• The output for each LDO is monitored for over-current
VIMG28 Status/Control Registers and Bits Description
REF
dissipation into account when supplying VIMG28 (and
VIMG25) directly from VPWR. For more information about
package thermal capabilities, reference
Management.
start tracking the battery voltage when V
below V
conditions and under-voltage events
Description
x4 = OFF
x5 = Low Power
x6 = Active
x7 = Active
x4 = OFF
x5 = Low Power
x6 = Active
x7 = Active
OIMG28
AOACCTLVIMG 28
VIMG28CFAULT
SELVIMG28
CTLVIMG 28
+ 300 mV.
Analog Integrated Circuit Device Data
Interface
SPI
Freescale Semiconductor
Thermal
BAT
decreases