SC900841JVKR2 Freescale Semiconductor, SC900841JVKR2 Datasheet - Page 89

• Manufacturer Part Number: SC900841JVKR2
• Description: IC POWER MGT 338-MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of SC900841JVKR2

• Applications: PC's, PDA's
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 338-TBGA
• Input Voltage: 2.8 V to 4.4 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Voltage - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

mobile platform for MID includes 17 LDO regulators, all of
which are housed in the 900841 PMIC.
LDO OPERATION MODES SELECTIONS
• OFF - The regulator is switched off
• Active
• Low Power
• TEST/TRIM
Table 44. SC900841 LDO Power Supplies Summary
Analog Integrated Circuit Device Data
Freescale Semiconductor
VCCPAOAC
VYMXYFI18
VYMXGPS
VYMXGPS
VCCPDDR
Regulator
Freescale’s power management solution for the Ultra-
• The regulator is switched on and the output is at the
• Maximum load current allowed
• The regulator is switched on and the output is at the
• load current is limited
VYMXYFI
VYMXYFI
VCC180
VPNL18
VPMIC
VAON
VCCA
VMM
VBG
programmed level
programmed level
Typ. Voltage
1.25 V
1.05 V
1.05 V
1.5 V
1.8 V
1.8 V
1.8 V
1.8 V
1.2 V
1.3 V
2.5 V
1.8 V
1.2 V
1.2 V
Continuous
Current
150 mA
390 mA
225 mA
200 mA
350 mA
150 mA
170 mA
155 mA
250 mA
2.0 mA
5.0 mA
50 mA
60 mA
60 mA
Max
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
Low Drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance,
low noise, and high PSRR with a low quiescent current and fast transient response.
LDO POWER SUPPLIES
the bias current is reduced. The output drive capability and
performance are limited in this mode. This mode occurs
automatically when the load current decreases below the low
power mode limit, except on VBG and VMM, in which this
mode can only be set through SPI programming. All other
LDOS can set the low power mode through SPI
programming.
current higher than the maximum allowed, the performance
of the LDO is not guaranteed.
• This is not a functional mode, thus requiring certain
• During this mode, the device performs measurements
All LDOS are able to work in a low power mode, in which
Note: If low power mode is set through the SPI at a load
Table 44
steps to prevent unintentional activation of this mode
and trimming
is a summary of LDO characteristics
Description
FUNCTIONAL DEVICE OPERATION
POWER SUPPLIES
900841
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