SC900841JVKR2 Freescale Semiconductor, SC900841JVKR2 Datasheet - Page 101

IC POWER MGT 338-MAPBGA

SC900841JVKR2

Manufacturer Part Number
SC900841JVKR2
Description
IC POWER MGT 338-MAPBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of SC900841JVKR2

Applications
PC's, PDA's
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
338-TBGA
Input Voltage
2.8 V to 4.4 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Voltage - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC900841JVKR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Table 55. VMM control Register Structure and Bits Description
VMM
a P-CH Pass FET. It is high performance, low noise, and high
PSRR, with a low quiescent current and fast transient
response. VMM will be actively discharged during shutdown.
Main Features
• Uses V15 as the main power supply
• 5.0 mA maximum continuous output current
• Optimized for a 1.0 µF external filter capacitor with a
Analog Integrated Circuit Device Data
Freescale Semiconductor
AOACCTLVMM
VMM is a low drop-out (LDO) fully integrated regulator with
maximum of 10 mΩ ESR
Reserved
CTLVMM
Name
(Shared with VCCPAOAC , VCCPDDR,
(Shared with VCCPAOAC, VCCPDDR,
V
OMM
Bits
2:0
5:3
7:6
VAON , and VCCP )
VAON, and VCCP)
VMM State Control
x0 = Reserved
x1 = Reserved
x2 = Reserved
x3 = Reserved
VMM State Control during AOAC Exit (when the Exit pin is EXITSTBY pin is asserted). These bits will be initialized
by the system SPI controller after power up.
X0 = Do not copy
x1 = Do not copy
x2 = Do not copy
x3 = Do not copy
Reserved
C
OMM
VOUTMM
GND1P5
PVIN 1P5
Figure 54. VMM Detailed Internal Block Diagram
VMMCNT (ADDR 0x47 - R/W - Default Value: 0x24)
Discharge
V
I
OMM
OMM
Controller
Z
Output Monitor
_
+
reference ground pin (GND1P5) with the VCCPAOAC,
VCCPDDR, VAON, and VCCP regulators, yet each has
independent control. PVIN1P5 is supplied from V15 voltage.
• Uses an internal pass FET
• The output for each LDO is monitored for over-current
VMM Status/Control Registers and Bits Description
V
VMM shares an input voltage pin (PVIN1P5) and a
conditions and under-voltage events
REF
Description
x4 = OFF
x5 = Low Power
x6 = Active
x7 = Active
x4 = OFF
x5 = Low Power
x6 = Active
x7 = Active
AOACCTLVMM
VMMCFAULT
CTLVMM
FUNCTIONAL DEVICE OPERATION
Interface
SPI
POWER SUPPLIES
900841
101

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