SC900841JVKR2 Freescale Semiconductor, SC900841JVKR2 Datasheet - Page 165

• Manufacturer Part Number: SC900841JVKR2
• Description: IC POWER MGT 338-MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of SC900841JVKR2

• Applications: PC's, PDA's
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 338-TBGA
• Input Voltage: 2.8 V to 4.4 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Voltage - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

coulomb counter is enabled, or in reset. Note that there is no
way to preset the CCOUT counter to an arbitrary value - only
to all zeros. Fuel gauging software must account for this reset
condition, which corresponds to a fully discharged battery.
that can be enabled through the CCDITHER bit in the
CCCREG register, to reduce spurious tones in the frequency
spectrum of the coulomb count values. The circuit performs a
random dithering of the integration period by +/- one cycle of
the 32 kHz sampling clock. The dither signal is a pseudo-
random bit pattern generated by a linear feedback shift
register (LFSR).
includes an input that is driven by the CCCALA bit in the
CCCREG register. When this bit is set, the input terminals of
the ADC's integrator are shorted together, and the current
sense resistor is disconnected. The user may integrate for as
short or as long a period as desired, using any particular
value of ONEC, to determine the rate at which the integrator
is changing with zero input signal. From this, the DC offset
can be calculated and subtracted from future Coulomb count
values by the fuel gauging software.
Table 109. ADC Interrupt/Mask Registers Structure and Bits Description
Analog Integrated Circuit Device Data
Freescale Semiconductor
MOVERFLOW
OVERFLOW
The coulomb counter block also includes a dithering circuit
For analog offset calibration, the coulomb counter block
MPENDET
Reserved
Reserved
PENDET
MRND
Name
RND
Bits
7:3
7:3
0
1
2
0
1
2
ADC Round Robin Cycle Completion Interrupt
x0 = Not Completed
x1 = Completed
Touch Screen Pen Detection Interrupt
x0 = Pen Not Detected
x1 = Pen Detected
Coulomb Counter reached 50% of it full scale value Interrupt
x0 = CC did not reach 50%
x1 = CC reached 50%
Reserved
ADC Round Robin Cycle Completion Interrupt Mask
x0 = Unmask
x1 = Mask
Touch Screen Pen Detection Interrupt Mask
x0 = Unmask
x1 = Mask
Coulomb Counter reached 50% of it full scale value Interrupt Mask
x0 = Unmask
x1 = Mask
Reserved
MADCINT (ADDR 0x60 - R/W -Default Value: 0x00)
ADCINT (ADDR 0x5F - R - Default Value: 0x00)
the CCFAULT bit in the CCCREG register, if the CCOUT
counter overflows during charging - i.e., if the CCOUT count
exceeds the maximum positive 15-bit value (32767) and
causes a carry to the sign bit. This should not occur if the
ONEC value is set appropriately for the total mAh of the
battery (typically it is set to represent 1.0 C), due to the very
large dynamic range of the Coulomb counter. If, however, a
small ONEC value is set - representing much less than 1.0 C,
the CCOUT counter may not have enough dynamic range to
accommodate the total number of Coulombs of battery
capacity, and the CCFAULT bit will be set. Note that
CCFAULT does not cause an interrupt. It is simply a status bit
that may be read at any time by the system firmware.
register that allows the sense of coulomb counting to be
reversed, so that negative values represent charging and
positive values represent discharging.
ADC STATUS/CONTROL REGISTERS AND
BIT DESCRIPTION
default state for each of these registers
Description
The block also contains fault detection logic, which sets
The block also includes a CCINVERT bit in the CCCREG
Reference the
Table 109
FUNCTIONAL DEVICE OPERATION
for read/write conditions and
ADC SUBSYSTEM
900841
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