NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 550
![IC MCU 32BIT 32KB FLASH 48LQFP](/photos/28/73/287342/nuc100lc1bn_sml.jpg)
NUC100LC1BN
Manufacturer Part Number
NUC100LC1BN
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Specifications of NUC100LC1BN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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External Bus Interface Timing CONTROL REGISTER (EXTIME)
Register
EXTIME
Bits
[31:28]
[27:24]
[23:16]
[15:12]
[11]
[10:8]
[7:3]
[2:0]
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Offset
EBI_BA+0x04
Descriptions
Reserved
ExtIR2R
Reserved
ExtIW2X
Reserved
ExttAHD
ExttACC
Reserved
30
22
14
6
Reserved
ExtIW2X
ExttACC
R/W
R/W
Reserved
Idle State Cycle Between Read-Read
When read action is finish and next action is going to read, idle state is inserted and
nCS return to high if ExtIR2R is not zero.
Idle state cycle = (ExtIR2R*MCLK)
Reserved
Idle State Cycle After Write
When write action is finish, idle state is inserted and nCS return to high if ExtIW2X is
not zero.
Idle state cycle = (ExtIW2X*MCLK)
Reserved
EBI Data Access Hold Time
ExttAHD define data access hold time (tAHD).
tAHD = (ExttAHD +1) * MCLK
EBI Data Access Time
ExttACC define data access time (tACC).
tACC = (ExttACC +1) * MCLK
Reserved
29
21
13
5
Description
External Bus Interface Timing Control Register
28
20
12
4
- 550 -
Reversed
Reversed
27
19
11
3
Publication Release Date: Dec. 22, 2010
26
18
10
2
ExtIR2R
Reversed
ExttAHD
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
24
16
8
0
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