NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 385
![IC MCU 32BIT 32KB FLASH 48LQFP](/photos/28/73/287342/nuc100lc1bn_sml.jpg)
NUC100LC1BN
Manufacturer Part Number
NUC100LC1BN
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Specifications of NUC100LC1BN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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NuMicro™ NUC100 Series Technical Reference Manual
TX_FIFO
The transmitter is buffered with a 64/16 byte FIFO to reduce the number of interrupts presented to
the CPU.
RX_FIFO
The receiver is buffered with a 64/16 byte FIFO (plus three error bits per byte) to reduce the
number of interrupts presented to the CPU.
TX shift Register
This block is the shifting the transmitting data out serially control block.
RX shift Register
This block is the shifting the receiving data in serially control block.
Modem Control Register
This register controls the interface to the MODEM or data set (or a peripheral device emulating a
MODEM).
Baud Rate Generator
Divide the external clock by the divisor to get the desired baud rate clock. Refer to baud rate
equation.
IrDA Encode
This block is IrDA encode control block.
IrDA Decode
This block is IrDA decode control block.
Control and Status Register
This field is register set that including the FIFO control registers (UA_FCR), FIFO status registers
(UA_FSR), and line control register (UA_LCR) for transmitter and receiver. The time out control
register (UA_TOR) identifies the condition of time out interrupt. This register set also includes the
interrupt enable register (UA_IER) and interrupt status register (UA_ISR) to enable or disable the
responding interrupt and to identify the occurrence of the responding interrupt. There are seven
types of interrupts, transmitter FIFO empty interrupt(INT_THRE), receiver threshold level reaching
interrupt (INT_RDA), line status interrupt (parity error or framing error or break interrupt)
(INT_RLS) , time out interrupt (INT_TOUT), MODEM/Wakeup status interrupt (INT_MODEM),
Buffer error interrupt (INT_BUF_ERR) and LIN receiver break field detected interrupt
(INT_LIN_RX_BREAK).
Publication Release Date: Oct 22, 2010
- 385 -
Revision V1.06
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