NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 408

• Manufacturer Part Number: NUC100LC1BN
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™r

Specifications of NUC100LC1BN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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NuMicro™ NUC100 Series Technical Reference Manual
Reserved
HW_LIN_RX_BR
EAK_IF
Reserved
HW_BUF_ERR_I
F
HW_TOUT_IF
HW_MODEM_IF
HW_RLS_IF
Reserved
LIN_RX_BREAK_
INT
Reserved
BUF_ERR_INT
TOUT_INT
This bit is set if RLS_IEN and HW_RLS_IF are both set to 1.
1 = The RLS interrupt is generated in DMA mode
0 = No RLS interrupt is generated in DMA mode
Reserved
In DMA Mode, LIN Bus RX Break Field Detect Interrupt Flag (Read Only)
This bit is set when RX received LIN break field. If UA_IER [LIN_RX_BRK_IEN] is
enabled the LIN RX break interrupt will be generated.
Note: This bit is read only, but can be cleared by writing ‘1’ to UA_ISR [7].
Reserved
In DMA Mode, Buffer Error Interrupt Flag (Read Only)
This bit is set when the TX or RX FIFO overflows (TX_OVER_IF or RX_OVER_IF is
set). When BUF_ERR_IF is set, the transfer maybe is not correct. If UA_IER
[BUF_ERR_IEN] is enabled, the buffer error interrupt will be generated.
Note: This bit is cleared when both TX_OVER_IF and RX_OVER_IF are cleared.
In DMA Mode, Time Out Interrupt Flag (Read Only)
This bit is set when the RX FIFO is not empty and no activities occurred in the RX
FIFO and the time out counter equal to TOIC. If UA_IER [TOUT_IEN] is enabled, the
Tout interrupt will be generated.
Note: This bit is read only and user can read UA_RBR (RX is in active) to clear it.
In DMA Mode, MODEM Interrupt Flag (Read Only) (not available in UART2
channel)
This bit is set when the CTS pin has state change (DCTSF=1). If UA_IER
[MODEM_IEN] is enabled, the Modem interrupt will be generated.
Note: This bit is read only and reset to 0 when bit DCTSF is cleared by a write 1 on
DCTSF.
In DMA Mode, Receive Line Status Flag (Read Only) (Low Density Only)
This bit is set when the RX receive data have parity error, framing error or break error
(at least one of 3 bits, BIF, FEF and PEF, is set). If UA_IER [RLS_IEN] is enabled, the
RLS interrupt will be generated.
Note: When in RS-485 function mode, this field include “receiver detect any address
byte received address byte character (bit9 = ‘1’) bit".
Note: This bit is read only and reset to 0 when all bits of BIF, FEF and PEF are cleared.
Reserved
LIN Bus RX Break Field Detected Interrupt Indicator (Read Only)
This bit is set if LIN_RX_BRK_IEN and LIN_RX_BREAK_IF are both set to 1.
1 = The LIN RX Break interrupt is generated
0 = No LIN RX Break interrupt is generated
Reserved
Buffer Error Interrupt Indicator (Read Only)
This bit is set if BUF_ERR_IEN and BUF_ERR_IF are both set to 1.
1 = The buffer error interrupt is generated
0 = No buffer error interrupt is generated
Time Out Interrupt Indicator (Read Only)
This bit is set if TOUT_IEN and TOUT_IF are both set to 1.
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Publication Release Date: Dec. 22, 2010
Revision V1.06