NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 380

IC MCU 32BIT 32KB FLASH 48LQFP

NUC100LC1BN

Manufacturer Part Number
NUC100LC1BN
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Datasheets

Specifications of NUC100LC1BN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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NuMicro™ NUC100 Series Technical Reference Manual
WTWKF
WTWKE
WTIF
WTRF
WTRE
WTR
0 = Disable the Watchdog timer interrupt
1 = Enable the Watchdog timer interrupt
Watchdog Timer Wakeup Flag
If Watchdog timer causes CPU wakes up from power-down mode, this bit will be
set to high. It must be cleared by software with a write 1 to this bit.
0 = Watchdog timer does not cause CPU wakeup.
1 = CPU wake up from sleep or power-down mode by Watchdog timeout.
Watchdog Timer Wakeup Function Enable bit (write-protection bit)
0 = Disable Watchdog timer Wakeup CPU function.
1 = Enable the Wakeup function that Watchdog timer timeout can wake up CPU
Note: CHIP can wakeup by WDT only if WDT clock source select RC10K
Watchdog Timer Interrupt Flag
If the Watchdog timer interrupt is enabled, then the hardware will set this bit to
indicate that the Watchdog timer interrupt has occurred.
0 = Watchdog timer interrupt did not occur
1 = Watchdog timer interrupt occurs
Note:This bit is cleared by writing 1 to this bit.
Watchdog Timer Reset Flag
When the Watchdog timer initiates a reset, the hardware will set this bit. This flag
can be read by software to determine the source of reset. Software is responsible
to clear it manually by writing 1 to it. If WTRE is disabled, then the Watchdog
timer has no effect on this bit.
0 = Watchdog timer reset did not occur
1 = Watchdog timer reset occurs
Note: This bit is cleared by writing 1 to this bit.
Watchdog Timer Reset Enable (write-protection bit)
Setting this bit will enable the Watchdog timer reset function.
0 = Disable Watchdog timer reset function
1 = Enable Watchdog timer reset function
Clear Watchdog Timer (write-protection bit)
Set this bit will clear the Watchdog timer.
0 = Writing 0 to this bit has no effect
1 = Reset the contents of the Watchdog timer
Note: This bit will auto clear after few clock cycle
from power-down mode.
- 380 -
Publication Release Date: Dec. 22, 2010
Revision V1.06

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