MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 389

• Manufacturer Part Number: MCF5272VM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

16.5.5
This section describes bus operation during read, write, and interrupt acknowledge cycles to the UART
module.
16.5.5.1
The UART module responds to reads with byte data. Reserved registers return zeros.
16.5.5.2
The UART module accepts write data as bytes. Write cycles to read-only or reserved registers complete
normally without exception processing, but data is ignored.
16.5.5.3
An internal interrupt request signal notifies the interrupt controller of any unmasked interrupt conditions.
The interrupt priority level is programmed in ICR2.
Freescale Semiconductor
USRn[RxRDY]
USRn[TxRDY]
Transmitter
Bus Operation
Receiver
Enabled
Enabled
Read Cycles
Write Cycles
Interrupt Acknowledge Cycles
internal
module
internal
module
select
select
RxD
TxD
UMR1n[PM] = 11
UMR1n[PT] = 1
UMR1n
UMR1n[PM] = 11
MCF5272 ColdFire
[PM] = 11
A/D
Figure 16-30. Multidrop Mode Timing Diagram
ADD 1
0
UMR1n[PT] = 0
ADD1
ADD1
®
A/D
A/D
Integrated Microprocessor User’s Manual, Rev. 3
C0
1
1
ADD 1
Peripheral Station
C0
C0
Master Station
A/D
A/D
Status Data
UMR1n[PT] = 2
(C0)
ADD 2
ADD2
ADD2
A/D
A/D
1
1
Status Data
(ADD 2)
A/D
0
UART Modules
16-29