MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 35

• Manufacturer Part Number: MCF5272VM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Table
Number
14-6
14-7
15-1
15-2
16-1
16-2
16-3
16-4
16-5
16-6
16-7
16-8
16-9
16-10
16-11
16-12
16-13
16-14
16-15
16-16
16-17
17-1
17-2
17-3
17-4
17-5
17-6
17-7
17-8
17-9
18-1
18-2
18-3
19-1
19-2
19-3
19-4
for 16-Bit Data Bus—SRAM Cycles19-21
19-5
for 16-Bit Data Bus—SDRAM Cycles19-21
19-6
19-7
19-8
Width Selection19-38
Freescale Semiconductor
QIR Field Descriptions ........................................................................................................ 14-13
QCR0–QCR15 Field Descriptions....................................................................................... 14-15
TMRn Field Descriptions....................................................................................................... 15-3
TERn Field Descriptions ....................................................................................................... 15-5
UART Module Programming Model ...................................................................................... 16-3
UMR1n Field Descriptions .................................................................................................... 16-5
UMR2n Field Descriptions .................................................................................................... 16-6
USRn Field Descriptions ....................................................................................................... 16-7
UCSRn Field Descriptions .................................................................................................... 16-8
UCRn Field Descriptions....................................................................................................... 16-9
UIPCRn Field Descriptions ................................................................................................. 16-11
UACRn Field Descriptions .................................................................................................. 16-12
UISRn/UIMRn Field Descriptions........................................................................................ 16-13
UTFn Field Descriptions...................................................................................................... 16-15
URFn Field Descriptions ..................................................................................................... 16-16
UFPDn Field Descriptions................................................................................................... 16-17
UIPn Field Descriptions....................................................................................................... 16-17
UOP1/UOP0 Field Descriptions .......................................................................................... 16-18
UART Module Signals......................................................................................................... 16-19
Transmitter FIFO Status Bits............................................................................................... 16-25
Receiver FIFO Status Bits................................................................................................... 16-26
GPIO Signal Multiplexing ...................................................................................................... 17-1
GPIO Port Register Memory Map ......................................................................................... 17-2
PACNT Field Descriptions .................................................................................................... 17-3
Port A Control Register Function Bits ................................................................................... 17-5
PBCNT Field Descriptions .................................................................................................... 17-6
Port B Control Register Function Bits ................................................................................... 17-7
PDCNT Field Descriptions .................................................................................................... 17-8
Port D Control Register Function Bits ................................................................................... 17-9
PADDR Field Descriptions .................................................................................................. 17-10
PWM Module Memory Map................................................................................................... 18-2
PWCRn Field Descriptions.................................................................................................... 18-3
PWWDn Field Descriptions................................................................................................... 18-4
Signal Descriptions Sorted by Function ................................................................................ 19-3
Signal Name and Description by Pin Number..................................................................... 19-11
Byte Strobe Operation for 32-Bit Data Bus ......................................................................... 19-20
Connecting BS[3:0] to DQMx .............................................................................................. 19-21
Processor Status Encoding................................................................................................. 19-37
MCF5272 Bus
Byte Strobe Operation
Byte Strobe Operation
MCF5272 ColdFire
List of Tables (Continued)
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Integrated Microprocessor User’s Manual, Rev. 3
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Number
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