UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 673

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
Remarks 1.
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
System clock
CPU
Flash memory
RAM
Port (latch)
16-bit timer/event counter 00
8-bit timer/event
counter
8-bit timer
Real-time counter (RTC)
Watchdog timer
Clock output
A/D converter
Operational amplifier 0 (AMP0,
PGA)
Operational amplifier 1 (AMP1)
Serial interface
External interrupt
Key interrupt
Power-on-clear function
Low-voltage detection function
On-chip debug function
Main system clock
Subsystem clock
f
IL
2.
Item
f
f
f
The functions mounted depend on the product.
Functions.
IH
EXCLK
EXCLKS
:
UART6
CSI10
CSI11
IICA
: External main system clock,
: External subsystem clock,
f
f
f
f
f
Internal high-speed oscillation clock,
IH
X
EXCLK
XT
EXCLKS
50
51
H0
H1
Clock supply to the CPU is stopped.
Operation stopped
Operation stopped (X1 and X2 pins are input port mode)
Clock input invalid (EXCLK pin is input port mode)
Operation stopped (XT1 and XT2 pins are input port mode)
Clock input invalid (EXCLKS pin is input port mode)
Operation stopped
Operation stopped (The value, however, is retained when the voltage is at least the power-
onclear detection voltage.)
Operation stopped
Operable
Operation stopped (however, operation continues at LVI reset)
Operation stopped
Table 20-1. Operation Statuses During Reset Period
f
f
f
X
XT
IL
During Reset Period
: X1 clock
: Internal low-speed oscillation clock
: XT1 clock
Refer to 1.4
CHAPTER 20 RESET FUNCTION
Block Diagram and 1.5
Outline of
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