UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 230

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
5.4.3 When subsystem clock is not used
not using the subsystem clock as an Input port, set the XT1 and XT2 pins to Input mode (OSCSELS = 0) and
independently connect to V
5.4.4 Internal high-speed oscillator
the internal oscillation mode register (RCM).
5.4.5 Internal low-speed oscillator
low-speed oscillation clock cannot be used as the CPU clock.
software” is set, oscillation can be controlled by the internal oscillation mode register (RCM).
(30 kHz (TYP.)) if the watchdog timer operation is enabled using the option byte.
5.4.6 Prescaler
the clock to be supplied to the CPU.
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Remark When using the subsystem clock, replace X1 and X2 with XT1 and XT2, respectively. Also, insert resistors
Caution
If it is not necessary to use the subsystem clock
Note
The internal high-speed oscillator is incorporated in the 78K0/Kx2-L microcontrollers. Oscillation can be controlled by
After a reset release, the internal high-speed oscillator automatically starts oscillation.
Internal high-speed oscillation clock frequency (4 MHz (TYP.)/8 MHz (TYP.)) can be set by the option byte.
The internal low-speed oscillator is incorporated in the 78K0/Kx2-L microcontrollers.
The internal low-speed oscillation clock is only used as the watchdog timer and the clock of 8-bit timer H1. The internal
“Can be stopped by software” or “Cannot be stopped” can be selected by the option byte. When “Can be stopped by
After a reset release, the internal low-speed oscillator automatically starts oscillation, and the watchdog timer is driven
The prescaler generates the CPU clock by dividing the main system clock when the main system clock is selected as
78K0/KC2-L only
in series on the XT2 side.
2. When X2 and XT1 are wired in parallel, the crosstalk noise of X2 may increase with XT1, resulting
in malfunctioning.
(e) Signals are fetched
V
SS
Figure 5-15. Examples of Incorrect Resonator Connection (2/2)
DD
X1
or V
SS
via a resistor.
X2
Note
for low power consumption operations, watch operations, etc., or if
CHAPTER 5 CLOCK GENERATOR
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