UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 389

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UPD78F0552MA-FAA-AX

Manufacturer Part Number
UPD78F0552MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0552MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Address: FF9EH
(3) Real-time counter control register 1 (RTCC1)
RTCC1
Symbol
The RTCC1 register is an 8-bit register that is used to control the alarm interrupt function and the wait time of the
counter.
RTCC1 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
When setting a value to the WALE bit while the counter operates (RTCE = 1) and WALIE = 1, rewrite the WALE bit
after disabling interrupt servicing INTRTC by using the interrupt mask flag register. Furthermore, clear the WAFG
and RTCIF flags after rewriting the WALE bit. When setting each alarm register (WALIE flag of RTCC1, the
ALARMWM register, the ALARMWH register, and the ALARMWW register), set match operation to be invalid (“0”)
for the WALE bit.
This is a status flag that indicates detection of matching with the alarm. It is valid only when WALE = 1 and is set to
“1” one clock (32.768 kHz) after matching of the alarm is detected. This flag is cleared when “0” is written to it.
Writing “1” to it is invalid.
WALIE
WAFG
WALE
WALE
<7>
After reset: 00H
0
1
0
1
0
1
Figure 10-4. Format of Real-Time Counter Control Register 1 (RTCC1) (1/2)
Match operation is invalid.
Match operation is valid.
Does not generate interrupt on matching of alarm.
Generates interrupt on matching of alarm.
Alarm mismatch
Detection of matching of alarm
WALIE
<6>
R/W
5
0
Control of alarm interrupt (INTRTC) function operation
WAFG
<4>
Alarm detection status flag
Alarm operation control
RIFG
<3>
CHAPTER 10 REAL-TIME COUNTER
2
0
RWST
<1>
RWAIT
<0>
375

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