UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 537

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Notes 1. The wait time is calculated as follows.
Remark STT0:
(Communication reservation)
2. The communication reservation operation executes a write to the IICA shift register (IICA) when a stop
MSTS0: Bit 7 of IICA status register 0 (IICAS0)
IICA:
IICWL: IICA low-level width setting register
IICWH: IICA high-level width setting register
t
f
(IICWL setting value + IICWH setting value + 4) + t
condition interrupt request occurs.
F
PRS
:
:
Bit 1 of IICA control register 0 (IICACTL0)
IICA shift register
SDAA0 and SCLA0 signal falling times
(refer to CHAPTER 28 ELECTRICAL SPECIFICATIONS)
Peripheral hardware clock frequency
Figure 15-28. Communication Reservation Protocol
Note 2
Yes
Cancel communication
reservation
Define communication
reservation
MOV IICA, #
MSTS0 = 0?
SET1 STT0
Wait
DI
EI
(Generate start condition)
No
H
F
× 2 × f
Sets STT0 flag (communication reservation)
Defines that communication reservation is in effect
(defines and sets user flag to any part of RAM)
Secures wait time
Confirmation of communication reservation
Clear user flag
IICA write operation
CHAPTER 15 SERIAL INTERFACE IICA
PRS
[clocks]
Note 1
by software.
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