UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 126

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
3.4.4 Short direct addressing
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
[Function]
[Operand format]
[Description example]
[Illustration]
Effective address
The memory to be manipulated in the fixed space is directly addressed with 8-bit data in an instruction word.
This addressing is applied to the 256-byte space FE20H to FF1FH. Internal high-speed RAM and special function
registers (SFRs) are mapped at FE20H to FEFFH and FF00H to FF1FH, respectively.
The SFR area (FF00H to FF1FH) where short direct addressing is applied is a part of the overall SFR area. Ports
that are frequently accessed in a program and compare and capture registers of the timer/event counter are mapped
in this area, allowing SFRs to be manipulated with a small number of bytes and clocks.
When 8-bit immediate data is at 20H to FFH, bit 8 of an effective address is set to 0. When it is at 00H to 1FH, bit 8
is set to 1. Refer to the [Illustration] shown below.
LB1 EQU 0FE30H ; Defines FE30H by LB1.
MOV LB1, A
When 8-bit immediate data is 20H to FFH,
When 8-bit immediate data is 00H to 1FH,
:
saddr
saddrp
Identifier
15
7
1
Operation code
1
; When LB1 indicates FE30H of the saddr area and the value of register A is transferred to that
address
1
saddr-offset
Immediate data that indicate label or FE20H to FF1FH (even address only)
Immediate data that indicate label or FE20H to FF1FH
OP code
1
1
1
1
1
0
α
α
0
8 7
1
0
= 1
= 0
1
1
1
1
0
0
Description
0
0
1
0
0
0
OP code
30H (saddr-offset)
CHAPTER 3 CPU ARCHITECTURE
0
Short direct memory
112