D17760BP200AD Renesas Electronics America, D17760BP200AD Datasheet - Page 922
D17760BP200AD
Manufacturer Part Number
D17760BP200AD
Description
IC SUPERH MPU ROMLESS 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D17760BP200AD
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D17760BP200AD
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
D17760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Rev. 2.00 Feb. 12, 2010 Page 838 of 1330
REJ09B0554-0200
Bit
11
10 to 6
5
4
3
2
1
0
Bit Name
TCR11
—
TCR5
TCR4
TCR3
TCR2
TCR1
TCR0
Initial Value
0
All 0
0
0
0
0
0
0
R/W
R/W
—
R/W
R/W
—
—
—
—
Description
Timer Clear-Set- Control by CANTCMR
Specifies if the Timer is to be cleared and set to 0
when CANTCMR matches to CANTCNTR. Please
note that the CANTCMR is also capable to
generate an interrupt signal to the host CPU via
IRR15.
0: Timer is not cleared by CANTCMR.
1: Timer is cleared by CANTCMR.
The write value should always be 0. The read
value cannot be guaranteed.
HCAN2 Timer Prescaler
This control fields allows the timer source clock (2
× Peripheral clock) to be divided before it is used
for the timer. The following relationship exists
between the source clock period and timer period:
000000: 1 × Source clock
000001: 2 × Source clock
000010: 4 × Source clock
000011: 6 × Source clock
000100: 8 × Source clock
111111: 126 × Source clock
Reserved
:
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