D17760BP200AD Renesas Electronics America, D17760BP200AD Datasheet - Page 812
D17760BP200AD
Manufacturer Part Number
D17760BP200AD
Description
IC SUPERH MPU ROMLESS 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D17760BP200AD
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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D17760BP200AD
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(7) Configuration Fields - Signal Format Fields
There are several more configuration bits in non-compressed mode which will now be
demonstrated. These bits are NOT mutually exclusive, however some configurations will probably
not be useful for any other device.
They are demonstrated by referring to the following basic sample format shown in figure 20.9.
Rev. 2.00 Feb. 12, 2010 Page 728 of 1330
REJ09B0554-0200
Figure 20.9 Basic Sample Format (Transmit Mode with Example System/Data Word
SSI_SDATA
SSI_SDATA
SCKP = 0, SWSP = 0, DEL = 1, CHNL = 11, SPDP = 0, SDTA = 1
System word length > data word length × 4
SSI_SCK
SSI_SCK
SSI_WS
SSI_WS
SWL = 6 bits (not attainable in SSI module, demonstration only)
DWL = 4 bits (not attainable in SSI module, demonstration only)
CHNL = 00, SCKP = 0, SWSP = 0, SPDP = 0, SDTA = 0, PDTA = 0, DEL = 0, MUEN = 0
4-bit data samples continuously written to SSITDR are transmitted onto the serial audio bus.
Key for this and following diagrams:
Figure 20.8 Multichannel Format (8 Channels, with Padding Bits First,
TDn
TD28
0
1
MSB
word 1
Data
0
Arrow head indicates sampling point of receiver
Bit n in SSITDR
means a low level on the serial bus (padding or mute)
means a high level on the serial bus (padding)
LSB
0
Followed by Serial Data, with Padding)
MSB
word 2
System word 1
Data
TD31 TD30 TD29 TD28
LSB MSB
1st channel
word 3
Data
LSB MSB
Length)
word 4
Data
LSB
0
0
MSB
word 5
Data
TD31 TD30 TD29 TD28
LSB MSB
2nd channel
word 6
Data
System word 2
LSB MSB
word 7
Data
LSB MSB
0
word 8
Data
0
LSB
TD31
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