D17760BP200AD Renesas Electronics America, D17760BP200AD Datasheet - Page 360
D17760BP200AD
Manufacturer Part Number
D17760BP200AD
Description
IC SUPERH MPU ROMLESS 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D17760BP200AD
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D17760BP200AD
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
D17760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Rev. 2.00 Feb. 12, 2010 Page 276 of 1330
REJ09B0554-0200
Bit
22
21
20
19
18
17
16
Bit
Name
A5B2
A5B1
A5B0
A4W2
A4W1
A4W0
⎯
Initial
Value
1
1
1
1
1
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Description
Area 5 Burst Pitch
These bits specify the number of wait cycles to be
inserted for the second and following data accesses in
burst transfer when area 5 is specified as burst ROM
area.
000:
001:
010:
011:
100:
101:
110:
111:
Area 4 Wait Control
These bits specify the number of wait cycles to be
inserted for area 4. For the case where an MPX interface
setting is made, see table 10.7.
000:
001:
010:
011:
100:
101:
110:
111:
Reserved
This bit is always read as 0. The write value should
always be 0.
Inserted wait cycles
0
1
2
3
4
5
6
7
Inserted wait cycles
0
1
2
3
6
9
12
15
RDY pin
Disabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
RDY pin
Disabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
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